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Diffstat (limited to 'src/Verismith/Verilog/BitVec.hs')
| -rw-r--r-- | src/Verismith/Verilog/BitVec.hs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/Verismith/Verilog/BitVec.hs b/src/Verismith/Verilog/BitVec.hs index e6c1a2a..bc594a3 100644 --- a/src/Verismith/Verilog/BitVec.hs +++ b/src/Verismith/Verilog/BitVec.hs @@ -2,7 +2,7 @@ Module : Verismith.Verilog.BitVec Description : Unsigned BitVec implementation. Copyright : (c) 2019, Yann Herklotz Grave -License : GPLv3 +License : GPL-3 Maintainer : yann [at] yannherklotz [dot] com Stability : experimental Portability : POSIX |