README.md « data - verismith - Verilog Fuzzer to test the major simulators and sythesisers by generating random, valid Verilog.

about summary refs log tree commit diff stats

path: root/data/README.md

blob: def3ad3b015e5db0274f8cdbaf9c8badf04e3e64 (plain)

# Cells

The implementation of the cells were initially taken from [VlogHammer
scripts](https://github.com/YosysHQ/VlogHammer/tree/master/testbench/scripts). Additions
were then implemented manually.