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Diffstat (limited to 'content.org')
| -rw-r--r-- | content.org | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/content.org b/content.org index 777ce28..c5e13ef 100644 --- a/content.org +++ b/content.org @@ -34,7 +34,7 @@ to the input. If these differ, the design is automatically reduced until the bug Here you can find all my previous posts: -** Vericert :coq:hardware:FPGA:verilog: +** TODO Vericert :coq:hardware:FPGA:verilog: :PROPERTIES: :EXPORT_DATE: 2021-09-07 :EXPORT_FILE_NAME: 2021-09-07-vericert |