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+title = "Problem with chaining in general"
+date = "2022-05-17"
+author = "Yann Herklotz"
+tags = []
+categories = []
+backlinks = ["1c4"]
+forwardlinks = ["1c4b"]
+zettelid = "1c4a"
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+
+The main problem with operation chaining in the current implementation
+of scheduling is that intermediate instructions limits the use of
+multiply and add (MAC) operations that are present in DSPs. This is
+because the synthesis tool cannot know if the register is used again,
+and therefore can't use a MAC operation directly, but instead has to do
+a multiply, store the result in a register, and then do an add, which
+will probably be in logic. This introduces a long delay and therefore
+heavily slows down the clock.