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+title = "Difference between hardware and software loop scheduling"
+author = "Yann Herklotz"
+tags = []
+categories = []
+backlinks = ["3c1", "1c6"]
+forwardlinks = ["1c6b", "1c6a1"]
+zettelid = "1c6a"
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+
+Loop scheduling is another name for loop pipelining, and maybe more
+accurate. There are two main types of this, hardware loop scheduling as
+in LegUp \[1\] and software loop scheduling as in Rau et al. \[2\].
+
+Even though both of these use the same algorithm to perform the loop
+scheduling, the main differences between the two are the following:
+
+Constraints
+:   The constraints for both methods will be quite different, because
+    software loop scheduling does not have as much freedom as hardware
+    loop scheduling, as the instructions are still quite linear and
+    executed one after another.
+
+Final representation
+:   The output of the loop scheduling algorithm is the reservation table
+    which places instructions into specific clock cycles. In hardware
+    scheduling, this can be directly translated into.
+
+<div id="refs" class="references csl-bib-body" markdown="1">
+
+<div id="ref-canis14_modul_sdc" class="csl-entry" markdown="1">
+
+<span class="csl-left-margin">\[1\]
+</span><span class="csl-right-inline">A. Canis, S. D. Brown, and J. H.
+Anderson, “Modulo SDC scheduling with recurrence minimization in
+high-level synthesis,” in *2014 24th international conference on field
+programmable logic and applications (FPL)*, Sep. 2014, pp. 1–8. doi:
+[10.1109/FPL.2014.6927490].</span>
+
+</div>
+
+<div id="ref-rau96_iterat_modul_sched" class="csl-entry" markdown="1">
+
+<span class="csl-left-margin">\[2\]
+</span><span class="csl-right-inline">B. R. Rau, “Iterative modulo
+scheduling,” *International Journal of Parallel Programming*, vol. 24,
+no. 1, pp. 3–64, Feb. 1996, Available:
+<https://doi.org/10.1007/BF03356742></span>
+
+</div>
+
+</div>
+
+  [10.1109/FPL.2014.6927490]: https://doi.org/10.1109/FPL.2014.6927490