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+title = "Speculative loop pipelining using GSA"
+date = "2022-04-29"
+author = "Yann Herklotz"
+tags = []
+categories = []
+backlinks = ["1c6c"]
+forwardlinks = ["2e1b", "1c6e"]
+zettelid = "1c6d"
++++
+
+This is work by Steven Derrien from Irisa Rennes \[1\].
+
+Using GSA ([\#2e1b]), one can generate loop pipelines with speculative
+execution support that can then be passed to a high-level synthesis tool
+(as this is a source-to-source translation). This is done by generating
+the GSA representation then using the predicates in the γ-functions to
+generate an FSM controlling the selection of the values for the
+γ-functions and control whether a rollback of the state is necessary, as
+well as generating an entry block and a commit block at the end to
+choose a correct value that is not speculated.
+
+The main idea is to perform a source-to-source translation which can
+still take advantage of static scheduling tools, therefore, this dynamic
+scheduling is introduced into the source code, in addition to the FSM
+that actually picks the state that should be gone into (if one has to
+perform a rollback or if everything is OK). Then, the actual memory
+accesses are transformed into accesses that the static scheduling tool
+can understand well, as affine expressions so that the distances are
+clear.
+
+<div id="refs" class="references csl-bib-body" markdown="1">
+
+<div id="ref-derrien20_towar_specul_loop_pipel_high_level_synth"
+class="csl-entry" markdown="1">
+
+<span class="csl-left-margin">\[1\]
+</span><span class="csl-right-inline">S. Derrien, T. Marty, S. Rokicki,
+and T. Yuki, “Toward speculative loop pipelining for high-level
+synthesis,” *IEEE Transactions on Computer-Aided Design of Integrated
+Circuits and Systems*, vol. 39, no. 11, pp. 4229–4239, Nov. 2020, doi:
+[10.1109/tcad.2020.3012866].</span>
+
+</div>
+
+</div>
+
+  [\#2e1b]: /zettel/2e1b
+  [10.1109/tcad.2020.3012866]: https://doi.org/10.1109/tcad.2020.3012866