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-rw-r--r--FPGA-led-lights.gise62
1 files changed, 60 insertions, 2 deletions
diff --git a/FPGA-led-lights.gise b/FPGA-led-lights.gise
index 206faba..481f264 100644
--- a/FPGA-led-lights.gise
+++ b/FPGA-led-lights.gise
@@ -21,8 +21,66 @@
<sourceproject xmlns="http://www.xilinx.com/XMLSchema" xil_pn:fileType="FILE_XISE" xil_pn:name="FPGA-led-lights.xise"/>
- <files xmlns="http://www.xilinx.com/XMLSchema"/>
+ <files xmlns="http://www.xilinx.com/XMLSchema">
+ <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/xst.xmsgs"/>
+ <file xil_pn:fileType="FILE_CMD_LOG" xil_pn:name="led.cmd_log"/>
+ <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_LSO" xil_pn:name="led.lso"/>
+ <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="led.prj"/>
+ <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_REPORT" xil_pn:name="led.syr"/>
+ <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST" xil_pn:name="led.xst"/>
+ <file xil_pn:fileType="FILE_HTML" xil_pn:name="led_summary.html"/>
+ <file xil_pn:fileType="FILE_XRPT" xil_pn:name="led_xst.xrpt"/>
+ <file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="webtalk_pn.xml"/>
+ <file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xst"/>
+ </files>
- <transforms xmlns="http://www.xilinx.com/XMLSchema"/>
+ <transforms xmlns="http://www.xilinx.com/XMLSchema">
+ <transform xil_pn:end_ts="1487546129" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1487546128">
+ <status xil_pn:value="SuccessfullyRun"/>
+ <status xil_pn:value="ReadyToRun"/>
+ </transform>
+ <transform xil_pn:end_ts="1487546129" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="6442174705589123182" xil_pn:start_ts="1487546129">
+ <status xil_pn:value="SuccessfullyRun"/>
+ <status xil_pn:value="ReadyToRun"/>
+ </transform>
+ <transform xil_pn:end_ts="1487546129" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="-1227048648073386772" xil_pn:start_ts="1487546129">
+ <status xil_pn:value="SuccessfullyRun"/>
+ <status xil_pn:value="ReadyToRun"/>
+ </transform>
+ <transform xil_pn:end_ts="1487546129" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1487546129">
+ <status xil_pn:value="SuccessfullyRun"/>
+ <status xil_pn:value="ReadyToRun"/>
+ </transform>
+ <transform xil_pn:end_ts="1487546129" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="2590979178147000940" xil_pn:start_ts="1487546129">
+ <status xil_pn:value="SuccessfullyRun"/>
+ <status xil_pn:value="ReadyToRun"/>
+ </transform>
+ <transform xil_pn:end_ts="1487546129" xil_pn:name="TRAN_SubProjectPreToStructuralProxy" xil_pn:prop_ck="5199527252420087910" xil_pn:start_ts="1487546129">
+ <status xil_pn:value="SuccessfullyRun"/>
+ <status xil_pn:value="ReadyToRun"/>
+ </transform>
+ <transform xil_pn:end_ts="1487546129" xil_pn:name="TRAN_platgen" xil_pn:prop_ck="-421007744913001546" xil_pn:start_ts="1487546129">
+ <status xil_pn:value="SuccessfullyRun"/>
+ <status xil_pn:value="ReadyToRun"/>
+ </transform>
+ <transform xil_pn:end_ts="1487546132" xil_pn:in_ck="131819641" xil_pn:name="TRANEXT_xstsynthesize_spartan3e" xil_pn:prop_ck="-9170951106228638093" xil_pn:start_ts="1487546129">
+ <status xil_pn:value="FailedRun"/>
+ <status xil_pn:value="ReadyToRun"/>
+ <status xil_pn:value="OutOfDateForInputs"/>
+ <status xil_pn:value="InputChanged"/>
+ <outfile xil_pn:name="_xmsgs/xst.xmsgs"/>
+ <outfile xil_pn:name="led.lso"/>
+ <outfile xil_pn:name="led.prj"/>
+ <outfile xil_pn:name="led.syr"/>
+ <outfile xil_pn:name="led.xst"/>
+ <outfile xil_pn:name="led_xst.xrpt"/>
+ <outfile xil_pn:name="webtalk_pn.xml"/>
+ <outfile xil_pn:name="xst"/>
+ </transform>
+ <transform xil_pn:end_ts="1487546132" xil_pn:in_ck="8586762664122563020" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="3734212952602903" xil_pn:start_ts="1487546132">
+ <status xil_pn:value="SuccessfullyRun"/>
+ <status xil_pn:value="ReadyToRun"/>
+ </transform>
+ </transforms>
</generated_project>