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Diffstat (limited to '_xmsgs/trce.xmsgs')
-rw-r--r-- | _xmsgs/trce.xmsgs | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/_xmsgs/trce.xmsgs b/_xmsgs/trce.xmsgs new file mode 100644 index 0000000..b8e4b55 --- /dev/null +++ b/_xmsgs/trce.xmsgs @@ -0,0 +1,15 @@ +<?xml version="1.0" encoding="UTF-8"?> +<!-- IMPORTANT: This is an internal file that has been generated + by the Xilinx ISE software. Any direct editing or + changes made to this file may result in unpredictable + behavior or data corruption. It is strongly advised that + users do not edit the contents of this file. --> +<messages> +<msg type="info" file="Timing" num="3412" delta="old" >To improve timing, see the Timing Closure User Guide (UG612).</msg> + +<msg type="info" file="Timing" num="2752" delta="old" >To get complete path coverage, use the unconstrained paths option. All paths that are not constrained will be reported in the unconstrained paths section(s) of the report.</msg> + +<msg type="info" file="Timing" num="3339" delta="old" >The clock-to-out numbers in this timing report are based on a 50 Ohm transmission line loading model. For the details of this model, and for more information on accounting for different loading conditions, please see the device datasheet.</msg> + +</messages> + |