diff options
Diffstat (limited to 'planAhead_run_2/FPGA-led-lights.data/sources_1')
3 files changed, 38 insertions, 0 deletions
diff --git a/planAhead_run_2/FPGA-led-lights.data/sources_1/chipscope.xml b/planAhead_run_2/FPGA-led-lights.data/sources_1/chipscope.xml new file mode 100644 index 0000000..3fd9702 --- /dev/null +++ b/planAhead_run_2/FPGA-led-lights.data/sources_1/chipscope.xml @@ -0,0 +1,6 @@ +<?xml version="1.0"?> +<ChipScope Version="1" Minor="3"> + <UnassignedNets> + </UnassignedNets> +</ChipScope> + diff --git a/planAhead_run_2/FPGA-led-lights.data/sources_1/fileset.xml b/planAhead_run_2/FPGA-led-lights.data/sources_1/fileset.xml new file mode 100644 index 0000000..9fa644d --- /dev/null +++ b/planAhead_run_2/FPGA-led-lights.data/sources_1/fileset.xml @@ -0,0 +1,24 @@ +<?xml version="1.0" encoding="UTF-8"?> +<DARoots Version="1" Minor="26"> + <FileSet Name="sources_1" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1"> + <Filter Type="EDIFSrcs"/> + <File Path="$PPRDIR/../led.ngc"> + <FileInfo> + <Attr Name="UsedInSynthesis" Val="1"/> + <Attr Name="UsedInImplementation" Val="1"/> + </FileInfo> + </File> + <File Path="$PDATADIR/sources_1/ports.xml"> + <FileInfo SFType="PortsDb"/> + </File> + <File Path="$PDATADIR/sources_1/chipscope.xml"> + <FileInfo SFType="ChipscopeDb"/> + </File> + <Config> + <Option Name="DesignMode" Val="GateLvl"/> + <Option Name="GateLvlMode" Val="EDIF"/> + <Option Name="TopFile" Val="$PPRDIR/../led.ngc"/> + <Option Name="TopAutoSet" Val="TRUE"/> + </Config> + </FileSet> +</DARoots> diff --git a/planAhead_run_2/FPGA-led-lights.data/sources_1/ports.xml b/planAhead_run_2/FPGA-led-lights.data/sources_1/ports.xml new file mode 100644 index 0000000..6edcb86 --- /dev/null +++ b/planAhead_run_2/FPGA-led-lights.data/sources_1/ports.xml @@ -0,0 +1,8 @@ +<?xml version="1.0"?> +<Interface Version="1" Minor="1"> + <Ifc Id="ROOT" Top="1"> + <Port Id="CLK" Dir="IN"/> + <Port Id="A0" Dir="OUT"/> + </Ifc> +</Interface> + |