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+// ----------------------------------------------------------------------------
+// SystemC Wrapper for Catapult Design HDL Netlist
+//
+// HLS version: 2011a.126 Production Release
+// HLS date: Wed Aug 8 00:52:07 PDT 2012
+// Flow Packages: HDL_Tcl 2008a.1, SCVerify 2009a.1
+//
+// Generated by: mg3115@EEWS104A-015
+// Generated date: Tue Mar 01 14:54:48 +0000 2016
+//
+// ----------------------------------------------------------------------------
+#ifndef INCLUDED_CCS_DUT_WRAPPER_H
+#define INCLUDED_CCS_DUT_WRAPPER_H
+
+#ifndef SC_USE_STD_STRING
+#define SC_USE_STD_STRING
+#endif
+
+#include <systemc.h>
+#include <mc_simulator_extensions.h>
+
+#if defined(CCS_DUT_SYSC)
+
+// alias ccs_DUT_wrapper to namespace enclosure of either cycle or RTL SystemC netlist
+namespace ccs_design {
+#if defined(CCS_DUT_CYCLE)
+//#include "cycle.cxx"
+#include "cycle.cxx"
+#else
+#if defined(CCS_DUT_RTL)
+//#include "rtl.cxx"
+#include "rtl.cxx"
+#endif
+#endif
+}
+typedef ccs_design::HDL::dot_product ccs_DUT_wrapper;
+
+#else
+
+// Create a foreign module wrapper around the HDL
+class ccs_DUT_wrapper : public mc_foreign_module
+{
+public:
+ #ifndef VCS_SYSTEMC
+ // Interface Ports
+ sc_in<bool> clk;
+ sc_in< sc_logic > en;
+ sc_in< sc_logic > arst_n;
+ sc_in< sc_lv<8> > input_a_rsc_z;
+ sc_in< sc_lv<8> > input_b_rsc_z;
+ sc_out< sc_lv<8> > output_rsc_z;
+ #endif
+
+public:
+ ccs_DUT_wrapper(const sc_module_name& nm, const char *hdl_name)
+ : mc_foreign_module(nm,hdl_name)
+ #ifndef VCS_SYSTEMC
+ ,clk("clk")
+ ,en("en")
+ ,arst_n("arst_n")
+ ,input_a_rsc_z("input_a_rsc_z")
+ ,input_b_rsc_z("input_b_rsc_z")
+ ,output_rsc_z("output_rsc_z")
+ #endif
+ {
+ // elaborate_foreign_module(hdl_name);
+ }
+
+ ~ccs_DUT_wrapper() {}
+ };
+
+ #endif
+
+#endif
+