1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
|
set a(0-283) {LIBRARY mgc_ioport MODULE mgc_in_wire(1,8) AREA_SCORE 0.00 QUANTITY 1 NAME MAC:io_read(input_a:rsc.d)#3 TYPE {I/O_READ VAR} DELAY {0.00 ns} PAR 0-282 XREFS 631 LOC {1 0.0 1 0.0 1 0.0 1 0.0 5 0.615714525} PREDS {} SUCCS {{258 0 0-285 {}} {128 0 0-286 {}} {128 0 0-290 {}} {128 0 0-294 {}} {128 0 0-297 {}}} CYCLES {}}
set a(0-284) {LIBRARY mgc_ioport MODULE mgc_in_wire(2,8) AREA_SCORE 0.00 QUANTITY 1 NAME MAC:io_read(input_b:rsc.d)#3 TYPE {I/O_READ VAR} DELAY {0.00 ns} PAR 0-282 XREFS 632 LOC {1 0.0 1 0.0 1 0.0 1 0.0 5 0.615714525} PREDS {} SUCCS {{259 0 0-285 {}} {128 0 0-287 {}} {128 0 0-291 {}} {128 0 0-295 {}} {128 0 0-298 {}}} CYCLES {}}
set a(0-285) {LIBRARY mgc_Altera-Cyclone-III-6_beh_psr MODULE mgc_mul(8,0,8,0,8) AREA_SCORE 330.25 QUANTITY 1 NAME MAC-4:mul TYPE MUL DELAY {2.66 ns} LIBRARY_DELAY {2.66 ns} PAR 0-282 XREFS 633 LOC {1 0.0 1 0.833798775 1 0.833798775 1 0.9999999407433434 5 0.7819156907433434} PREDS {{258 0 0-283 {}} {259 0 0-284 {}}} SUCCS {{258 0 0-289 {}}} CYCLES {}}
set a(0-286) {LIBRARY mgc_ioport MODULE mgc_in_wire(1,8) AREA_SCORE 0.00 QUANTITY 1 NAME MAC:io_read(input_a:rsc.d)#4 TYPE {I/O_READ VAR} DELAY {0.00 ns} PAR 0-282 XREFS 634 LOC {1 0.0 2 0.0 2 0.0 2 0.0 5 0.615714525} PREDS {{128 0 0-283 {}}} SUCCS {{258 0 0-288 {}} {128 0 0-290 {}} {128 0 0-294 {}} {128 0 0-297 {}}} CYCLES {}}
set a(0-287) {LIBRARY mgc_ioport MODULE mgc_in_wire(2,8) AREA_SCORE 0.00 QUANTITY 1 NAME MAC:io_read(input_b:rsc.d)#4 TYPE {I/O_READ VAR} DELAY {0.00 ns} PAR 0-282 XREFS 635 LOC {1 0.0 2 0.0 2 0.0 2 0.0 5 0.615714525} PREDS {{128 0 0-284 {}}} SUCCS {{259 0 0-288 {}} {128 0 0-291 {}} {128 0 0-295 {}} {128 0 0-298 {}}} CYCLES {}}
set a(0-288) {LIBRARY mgc_Altera-Cyclone-III-6_beh_psr MODULE mgc_mul(8,0,8,0,8) AREA_SCORE 330.25 QUANTITY 1 NAME MAC-5:mul TYPE MUL DELAY {2.66 ns} LIBRARY_DELAY {2.66 ns} PAR 0-282 XREFS 636 LOC {1 0.0 2 0.761104025 2 0.761104025 2 0.9273051907433434 5 0.7819156907433434} PREDS {{258 0 0-286 {}} {259 0 0-287 {}}} SUCCS {{259 0 0-289 {}}} CYCLES {}}
set a(0-289) {LIBRARY mgc_Altera-Cyclone-III-6_beh_psr MODULE mgc_add(8,0,8,0,8) AREA_SCORE 9.26 QUANTITY 4 NAME MAC:acc#6 TYPE ACCU DELAY {1.16 ns} LIBRARY_DELAY {1.16 ns} PAR 0-282 XREFS 637 LOC {1 0.16620122499999998 2 0.92730525 2 0.92730525 2 0.9999999527684257 5 0.8546104527684256} PREDS {{258 0 0-285 {}} {259 0 0-288 {}}} SUCCS {{258 0 0-293 {}}} CYCLES {}}
set a(0-290) {LIBRARY mgc_ioport MODULE mgc_in_wire(1,8) AREA_SCORE 0.00 QUANTITY 1 NAME MAC:io_read(input_a:rsc.d) TYPE {I/O_READ VAR} DELAY {0.00 ns} PAR 0-282 XREFS 638 LOC {1 0.0 3 0.0 3 0.0 3 0.0 5 0.6884092749999999} PREDS {{128 0 0-283 {}} {128 0 0-286 {}}} SUCCS {{258 0 0-292 {}} {128 0 0-294 {}} {128 0 0-297 {}}} CYCLES {}}
set a(0-291) {LIBRARY mgc_ioport MODULE mgc_in_wire(2,8) AREA_SCORE 0.00 QUANTITY 1 NAME MAC:io_read(input_b:rsc.d) TYPE {I/O_READ VAR} DELAY {0.00 ns} PAR 0-282 XREFS 639 LOC {1 0.0 3 0.0 3 0.0 3 0.0 5 0.6884092749999999} PREDS {{128 0 0-284 {}} {128 0 0-287 {}}} SUCCS {{259 0 0-292 {}} {128 0 0-295 {}} {128 0 0-298 {}}} CYCLES {}}
set a(0-292) {LIBRARY mgc_Altera-Cyclone-III-6_beh_psr MODULE mgc_mul(8,0,8,0,8) AREA_SCORE 330.25 QUANTITY 1 NAME MAC-1:mul TYPE MUL DELAY {2.66 ns} LIBRARY_DELAY {2.66 ns} PAR 0-282 XREFS 640 LOC {1 0.0 3 0.761104025 3 0.761104025 3 0.9273051907433434 5 0.8546104407433434} PREDS {{258 0 0-290 {}} {259 0 0-291 {}}} SUCCS {{259 0 0-293 {}}} CYCLES {}}
set a(0-293) {LIBRARY mgc_Altera-Cyclone-III-6_beh_psr MODULE mgc_add(8,0,8,0,8) AREA_SCORE 9.26 QUANTITY 4 NAME MAC:acc TYPE ACCU DELAY {1.16 ns} LIBRARY_DELAY {1.16 ns} PAR 0-282 XREFS 641 LOC {1 0.23889597499999998 3 0.92730525 3 0.92730525 3 0.9999999527684257 5 0.9273052027684257} PREDS {{258 0 0-289 {}} {259 0 0-292 {}}} SUCCS {{258 0 0-301 {}}} CYCLES {}}
set a(0-294) {LIBRARY mgc_ioport MODULE mgc_in_wire(1,8) AREA_SCORE 0.00 QUANTITY 1 NAME MAC:io_read(input_a:rsc.d)#1 TYPE {I/O_READ VAR} DELAY {0.00 ns} PAR 0-282 XREFS 642 LOC {1 0.0 4 0.0 4 0.0 4 0.0 5 0.6884092749999999} PREDS {{128 0 0-283 {}} {128 0 0-286 {}} {128 0 0-290 {}}} SUCCS {{258 0 0-296 {}} {128 0 0-297 {}}} CYCLES {}}
set a(0-295) {LIBRARY mgc_ioport MODULE mgc_in_wire(2,8) AREA_SCORE 0.00 QUANTITY 1 NAME MAC:io_read(input_b:rsc.d)#1 TYPE {I/O_READ VAR} DELAY {0.00 ns} PAR 0-282 XREFS 643 LOC {1 0.0 4 0.0 4 0.0 4 0.0 5 0.6884092749999999} PREDS {{128 0 0-284 {}} {128 0 0-287 {}} {128 0 0-291 {}}} SUCCS {{259 0 0-296 {}} {128 0 0-298 {}}} CYCLES {}}
set a(0-296) {LIBRARY mgc_Altera-Cyclone-III-6_beh_psr MODULE mgc_mul(8,0,8,0,8) AREA_SCORE 330.25 QUANTITY 1 NAME MAC-2:mul TYPE MUL DELAY {2.66 ns} LIBRARY_DELAY {2.66 ns} PAR 0-282 XREFS 644 LOC {1 0.0 4 0.833798775 4 0.833798775 4 0.9999999407433434 5 0.8546104407433434} PREDS {{258 0 0-294 {}} {259 0 0-295 {}}} SUCCS {{258 0 0-300 {}}} CYCLES {}}
set a(0-297) {LIBRARY mgc_ioport MODULE mgc_in_wire(1,8) AREA_SCORE 0.00 QUANTITY 1 NAME MAC:io_read(input_a:rsc.d)#2 TYPE {I/O_READ VAR} DELAY {0.00 ns} PAR 0-282 XREFS 645 LOC {1 0.0 5 0.0 5 0.0 5 0.0 5 0.6884092749999999} PREDS {{128 0 0-283 {}} {128 0 0-286 {}} {128 0 0-290 {}} {128 0 0-294 {}}} SUCCS {{258 0 0-299 {}}} CYCLES {}}
set a(0-298) {LIBRARY mgc_ioport MODULE mgc_in_wire(2,8) AREA_SCORE 0.00 QUANTITY 1 NAME MAC:io_read(input_b:rsc.d)#2 TYPE {I/O_READ VAR} DELAY {0.00 ns} PAR 0-282 XREFS 646 LOC {1 0.0 5 0.0 5 0.0 5 0.0 5 0.6884092749999999} PREDS {{128 0 0-284 {}} {128 0 0-287 {}} {128 0 0-291 {}} {128 0 0-295 {}}} SUCCS {{259 0 0-299 {}}} CYCLES {}}
set a(0-299) {LIBRARY mgc_Altera-Cyclone-III-6_beh_psr MODULE mgc_mul(8,0,8,0,8) AREA_SCORE 330.25 QUANTITY 1 NAME MAC-3:mul TYPE MUL DELAY {2.66 ns} LIBRARY_DELAY {2.66 ns} PAR 0-282 XREFS 647 LOC {1 0.0 5 0.6884092749999999 5 0.6884092749999999 5 0.8546104407433434 5 0.8546104407433434} PREDS {{258 0 0-297 {}} {259 0 0-298 {}}} SUCCS {{259 0 0-300 {}}} CYCLES {}}
set a(0-300) {LIBRARY mgc_Altera-Cyclone-III-6_beh_psr MODULE mgc_add(8,0,8,0,8) AREA_SCORE 9.26 QUANTITY 4 NAME MAC:acc#5 TYPE ACCU DELAY {1.16 ns} LIBRARY_DELAY {1.16 ns} PAR 0-282 XREFS 648 LOC {1 0.16620122499999998 5 0.8546104999999999 5 0.8546104999999999 5 0.9273052027684257 5 0.9273052027684257} PREDS {{258 0 0-296 {}} {259 0 0-299 {}}} SUCCS {{259 0 0-301 {}}} CYCLES {}}
set a(0-301) {LIBRARY mgc_Altera-Cyclone-III-6_beh_psr MODULE mgc_add(8,0,8,0,8) AREA_SCORE 9.26 QUANTITY 4 NAME MAC-5:acc#3 TYPE ACCU DELAY {1.16 ns} LIBRARY_DELAY {1.16 ns} PAR 0-282 XREFS 649 LOC {1 0.311590725 5 0.92730525 5 0.92730525 5 0.9999999527684257 5 0.9999999527684257} PREDS {{258 0 0-293 {}} {259 0 0-300 {}}} SUCCS {{259 0 0-302 {}}} CYCLES {}}
set a(0-302) {LIBRARY mgc_ioport MODULE mgc_out_stdreg(3,8) AREA_SCORE 0.00 QUANTITY 1 NAME io_write(output:rsc.d) TYPE {I/O_WRITE VAR} DELAY {0.00 ns} PAR 0-282 XREFS 650 LOC {1 1.0 5 1.0 5 1.0 6 0.0 5 0.9999} PREDS {{772 0 0-302 {}} {259 0 0-301 {}}} SUCCS {{772 0 0-302 {}}} CYCLES {}}
set a(0-282) {CHI {0-283 0-284 0-285 0-286 0-287 0-288 0-289 0-290 0-291 0-292 0-293 0-294 0-295 0-296 0-297 0-298 0-299 0-300 0-301 0-302} ITERATIONS Infinite LATENCY 5 RESET_LATENCY 0 CSTEPS 6 UNROLL 0 PERIOD {20.00 ns} FULL_PERIOD {20.00 ns} THROUGHPUT_PERIOD 6 %_SHARING_ALLOC {20.0 %} PIPELINED No CYCLES_IN 6 TOTAL_CYCLES_IN 6 TOTAL_CYCLES_UNDER 0 TOTAL_CYCLES 6 NAME main TYPE LOOP DELAY {140.00 ns} PAR {} XREFS 651 LOC {0 0.0 0 0.0 0 0.0 1 0.0} PREDS {} SUCCS {} CYCLES {}}
set a(0-282-TOTALCYCLES) {6}
set a(0-282-QMOD) {mgc_ioport.mgc_in_wire(1,8) {0-283 0-286 0-290 0-294 0-297} mgc_ioport.mgc_in_wire(2,8) {0-284 0-287 0-291 0-295 0-298} mgc_Altera-Cyclone-III-6_beh_psr.mgc_mul(8,0,8,0,8) {0-285 0-288 0-292 0-296 0-299} mgc_Altera-Cyclone-III-6_beh_psr.mgc_add(8,0,8,0,8) {0-289 0-293 0-300 0-301} mgc_ioport.mgc_out_stdreg(3,8) 0-302}
set a(0-282-PROC_NAME) {core}
set a(0-282-HIER_NAME) {/dot_product/core}
set a(TOP) {0-282}
|
