Sdram_FIFO.qip « Sdram_Control_4Port « DE0_CAMERA_MOUSE « quartus_proj « prj2 « student_files_2015 « student_files_2015 - dot_product - An implementation of a dotproduct for FPGAs using Catapult C.

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set_global_assignment -name IP_TOOL_NAME "FIFO"
set_global_assignment -name IP_TOOL_VERSION "10.0"
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "Sdram_FIFO.v"]