summaryrefslogtreecommitdiffstats
path: root/Sobel/Sobel Quartus/db/sobel.map.qmsg
diff options
context:
space:
mode:
Diffstat (limited to 'Sobel/Sobel Quartus/db/sobel.map.qmsg')
-rw-r--r--Sobel/Sobel Quartus/db/sobel.map.qmsg53
1 files changed, 53 insertions, 0 deletions
diff --git a/Sobel/Sobel Quartus/db/sobel.map.qmsg b/Sobel/Sobel Quartus/db/sobel.map.qmsg
new file mode 100644
index 0000000..fca1c8a
--- /dev/null
+++ b/Sobel/Sobel Quartus/db/sobel.map.qmsg
@@ -0,0 +1,53 @@
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1457454100457 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II 64-Bit " "Running Quartus II 64-Bit Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version " "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1457454100462 ""} { "Info" "IQEXE_START_BANNER_TIME" "Tue Mar 08 16:21:39 2016 " "Processing started: Tue Mar 08 16:21:39 2016" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1457454100462 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1457454100462 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off sobel -c sobel " "Command: quartus_map --read_settings_files=on --write_settings_files=off sobel -c sobel" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1457454100462 ""}
+{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS_MORE_LOGICAL" "4 4 8 " "Parallel Compilation has detected 8 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 4 of the 4 physical processors detected instead." { } { } 0 11104 "Parallel Compilation has detected %3!i! hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use %1!i! of the %2!i! physical processors detected instead." 0 0 "Quartus II" 0 -1 1457454102791 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "//icnas3.cc.ic.ac.uk/mg3115/eie1 fpga/sobel filter catapult/sobel/sobel.v12/rtl_mgc_ioport.v 20 20 " "Found 20 design units, including 20 entities, in source file //icnas3.cc.ic.ac.uk/mg3115/eie1 fpga/sobel filter catapult/sobel/sobel.v12/rtl_mgc_ioport.v" { { "Info" "ISGN_ENTITY_NAME" "1 mgc_in_wire " "Found entity 1: mgc_in_wire" { } { { "../sobel.v12/rtl_mgc_ioport.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/sobel.v12/rtl_mgc_ioport.v" 13 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454102897 ""} { "Info" "ISGN_ENTITY_NAME" "2 mgc_in_wire_en " "Found entity 2: mgc_in_wire_en" { } { { "../sobel.v12/rtl_mgc_ioport.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/sobel.v12/rtl_mgc_ioport.v" 29 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454102897 ""} { "Info" "ISGN_ENTITY_NAME" "3 mgc_in_wire_wait " "Found entity 3: mgc_in_wire_wait" { } { { "../sobel.v12/rtl_mgc_ioport.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/sobel.v12/rtl_mgc_ioport.v" 49 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454102897 ""} { "Info" "ISGN_ENTITY_NAME" "4 mgc_chan_in " "Found entity 4: mgc_chan_in" { } { { "../sobel.v12/rtl_mgc_ioport.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/sobel.v12/rtl_mgc_ioport.v" 72 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454102897 ""} { "Info" "ISGN_ENTITY_NAME" "5 mgc_out_stdreg " "Found entity 5: mgc_out_stdreg" { } { { "../sobel.v12/rtl_mgc_ioport.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/sobel.v12/rtl_mgc_ioport.v" 109 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454102897 ""} { "Info" "ISGN_ENTITY_NAME" "6 mgc_out_stdreg_en " "Found entity 6: mgc_out_stdreg_en" { } { { "../sobel.v12/rtl_mgc_ioport.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/sobel.v12/rtl_mgc_ioport.v" 125 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454102897 ""} { "Info" "ISGN_ENTITY_NAME" "7 mgc_out_stdreg_wait " "Found entity 7: mgc_out_stdreg_wait" { } { { "../sobel.v12/rtl_mgc_ioport.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/sobel.v12/rtl_mgc_ioport.v" 145 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454102897 ""} { "Info" "ISGN_ENTITY_NAME" "8 mgc_out_prereg_en " "Found entity 8: mgc_out_prereg_en" { } { { "../sobel.v12/rtl_mgc_ioport.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/sobel.v12/rtl_mgc_ioport.v" 169 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454102897 ""} { "Info" "ISGN_ENTITY_NAME" "9 mgc_inout_stdreg_en " "Found entity 9: mgc_inout_stdreg_en" { } { { "../sobel.v12/rtl_mgc_ioport.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/sobel.v12/rtl_mgc_ioport.v" 191 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454102897 ""} { "Info" "ISGN_ENTITY_NAME" "10 hid_tribuf " "Found entity 10: hid_tribuf" { } { { "../sobel.v12/rtl_mgc_ioport.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/sobel.v12/rtl_mgc_ioport.v" 217 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454102897 ""} { "Info" "ISGN_ENTITY_NAME" "11 mgc_inout_stdreg_wait " "Found entity 11: mgc_inout_stdreg_wait" { } { { "../sobel.v12/rtl_mgc_ioport.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/sobel.v12/rtl_mgc_ioport.v" 229 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454102897 ""} { "Info" "ISGN_ENTITY_NAME" "12 mgc_inout_buf_wait " "Found entity 12: mgc_inout_buf_wait" { } { { "../sobel.v12/rtl_mgc_ioport.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/sobel.v12/rtl_mgc_ioport.v" 269 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454102897 ""} { "Info" "ISGN_ENTITY_NAME" "13 mgc_inout_fifo_wait " "Found entity 13: mgc_inout_fifo_wait" { } { { "../sobel.v12/rtl_mgc_ioport.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/sobel.v12/rtl_mgc_ioport.v" 339 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454102897 ""} { "Info" "ISGN_ENTITY_NAME" "14 mgc_io_sync " "Found entity 14: mgc_io_sync" { } { { "../sobel.v12/rtl_mgc_ioport.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/sobel.v12/rtl_mgc_ioport.v" 419 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454102897 ""} { "Info" "ISGN_ENTITY_NAME" "15 mgc_bsync_rdy " "Found entity 15: mgc_bsync_rdy" { } { { "../sobel.v12/rtl_mgc_ioport.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/sobel.v12/rtl_mgc_ioport.v" 428 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454102897 ""} { "Info" "ISGN_ENTITY_NAME" "16 mgc_bsync_vld " "Found entity 16: mgc_bsync_vld" { } { { "../sobel.v12/rtl_mgc_ioport.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/sobel.v12/rtl_mgc_ioport.v" 443 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454102897 ""} { "Info" "ISGN_ENTITY_NAME" "17 mgc_bsync_rv " "Found entity 17: mgc_bsync_rv" { } { { "../sobel.v12/rtl_mgc_ioport.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/sobel.v12/rtl_mgc_ioport.v" 458 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454102897 ""} { "Info" "ISGN_ENTITY_NAME" "18 mgc_sync " "Found entity 18: mgc_sync" { } { { "../sobel.v12/rtl_mgc_ioport.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/sobel.v12/rtl_mgc_ioport.v" 479 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454102897 ""} { "Info" "ISGN_ENTITY_NAME" "19 funccall_inout " "Found entity 19: funccall_inout" { } { { "../sobel.v12/rtl_mgc_ioport.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/sobel.v12/rtl_mgc_ioport.v" 498 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454102897 ""} { "Info" "ISGN_ENTITY_NAME" "20 modulario_en_in " "Found entity 20: modulario_en_in" { } { { "../sobel.v12/rtl_mgc_ioport.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/sobel.v12/rtl_mgc_ioport.v" 526 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454102897 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1457454102897 ""}
+{ "Warning" "WSGN_SEARCH_FILE" "sobel.v 2 2 " "Using design file sobel.v, which is not specified as a design file for the current project, but contains definitions for 2 design units and 2 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 sobel_core " "Found entity 1: sobel_core" { } { { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 16 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454106833 ""} { "Info" "ISGN_ENTITY_NAME" "2 sobel " "Found entity 2: sobel" { } { { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 1573 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1457454106833 ""} } { } 0 12125 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "Quartus II" 0 -1 1457454106833 ""}
+{ "Info" "ISGN_START_ELABORATION_TOP" "sobel " "Elaborating entity \"sobel\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Quartus II" 0 -1 1457454106866 ""}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "mgc_in_wire mgc_in_wire:vin_rsc_mgc_in_wire " "Elaborating entity \"mgc_in_wire\" for hierarchy \"mgc_in_wire:vin_rsc_mgc_in_wire\"" { } { { "sobel.v" "vin_rsc_mgc_in_wire" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 1593 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454107431 ""}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "mgc_out_stdreg mgc_out_stdreg:vout_rsc_mgc_out_stdreg " "Elaborating entity \"mgc_out_stdreg\" for hierarchy \"mgc_out_stdreg:vout_rsc_mgc_out_stdreg\"" { } { { "sobel.v" "vout_rsc_mgc_out_stdreg" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 1598 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454107609 ""}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "sobel_core sobel_core:sobel_core_inst " "Elaborating entity \"sobel_core\" for hierarchy \"sobel_core:sobel_core_inst\"" { } { { "sobel.v" "sobel_core_inst" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 1605 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454107701 ""}
+{ "Info" "ILPMS_INFERENCING_SUMMARY" "9 " "Inferred 9 megafunctions from design logic" { { "Info" "ILPMS_LPM_MULT_INFERRED" "sobel_core:sobel_core_inst\|Mult0 lpm_mult " "Inferred multiplier megafunction (\"lpm_mult\") from the following logic: \"sobel_core:sobel_core_inst\|Mult0\"" { } { { "sobel.v" "Mult0" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 187 -1 0 } } } 0 278003 "Inferred multiplier megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Quartus II" 0 -1 1457454109046 ""} { "Info" "ILPMS_LPM_MULT_INFERRED" "sobel_core:sobel_core_inst\|Mult1 lpm_mult " "Inferred multiplier megafunction (\"lpm_mult\") from the following logic: \"sobel_core:sobel_core_inst\|Mult1\"" { } { { "sobel.v" "Mult1" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 188 -1 0 } } } 0 278003 "Inferred multiplier megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Quartus II" 0 -1 1457454109046 ""} { "Info" "ILPMS_LPM_MULT_INFERRED" "sobel_core:sobel_core_inst\|Mult7 lpm_mult " "Inferred multiplier megafunction (\"lpm_mult\") from the following logic: \"sobel_core:sobel_core_inst\|Mult7\"" { } { { "sobel.v" "Mult7" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 615 -1 0 } } } 0 278003 "Inferred multiplier megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Quartus II" 0 -1 1457454109046 ""} { "Info" "ILPMS_LPM_MULT_INFERRED" "sobel_core:sobel_core_inst\|Mult5 lpm_mult " "Inferred multiplier megafunction (\"lpm_mult\") from the following logic: \"sobel_core:sobel_core_inst\|Mult5\"" { } { { "sobel.v" "Mult5" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 605 -1 0 } } } 0 278003 "Inferred multiplier megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Quartus II" 0 -1 1457454109046 ""} { "Info" "ILPMS_LPM_MULT_INFERRED" "sobel_core:sobel_core_inst\|Mult2 lpm_mult " "Inferred multiplier megafunction (\"lpm_mult\") from the following logic: \"sobel_core:sobel_core_inst\|Mult2\"" { } { { "sobel.v" "Mult2" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 412 -1 0 } } } 0 278003 "Inferred multiplier megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Quartus II" 0 -1 1457454109046 ""} { "Info" "ILPMS_LPM_MULT_INFERRED" "sobel_core:sobel_core_inst\|Mult3 lpm_mult " "Inferred multiplier megafunction (\"lpm_mult\") from the following logic: \"sobel_core:sobel_core_inst\|Mult3\"" { } { { "sobel.v" "Mult3" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 521 -1 0 } } } 0 278003 "Inferred multiplier megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Quartus II" 0 -1 1457454109046 ""} { "Info" "ILPMS_LPM_MULT_INFERRED" "sobel_core:sobel_core_inst\|Mult6 lpm_mult " "Inferred multiplier megafunction (\"lpm_mult\") from the following logic: \"sobel_core:sobel_core_inst\|Mult6\"" { } { { "sobel.v" "Mult6" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 612 -1 0 } } } 0 278003 "Inferred multiplier megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Quartus II" 0 -1 1457454109046 ""} { "Info" "ILPMS_LPM_MULT_INFERRED" "sobel_core:sobel_core_inst\|Mult4 lpm_mult " "Inferred multiplier megafunction (\"lpm_mult\") from the following logic: \"sobel_core:sobel_core_inst\|Mult4\"" { } { { "sobel.v" "Mult4" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 601 -1 0 } } } 0 278003 "Inferred multiplier megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Quartus II" 0 -1 1457454109046 ""} { "Info" "ILPMS_LPM_MULT_INFERRED" "sobel_core:sobel_core_inst\|Mult8 lpm_mult " "Inferred multiplier megafunction (\"lpm_mult\") from the following logic: \"sobel_core:sobel_core_inst\|Mult8\"" { } { { "sobel.v" "Mult8" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 784 -1 0 } } } 0 278003 "Inferred multiplier megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Quartus II" 0 -1 1457454109046 ""} } { } 0 278001 "Inferred %1!llu! megafunctions from design logic" 0 0 "Quartus II" 0 -1 1457454109046 ""}
+{ "Info" "ISGN_ELABORATION_HEADER" "sobel_core:sobel_core_inst\|lpm_mult:Mult0 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult0\"" { } { { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 187 -1 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Quartus II" 0 -1 1457454109318 ""}
+{ "Info" "ISGN_MEGAFN_PARAM_TOP" "sobel_core:sobel_core_inst\|lpm_mult:Mult0 " "Instantiated megafunction \"sobel_core:sobel_core_inst\|lpm_mult:Mult0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHA 2 " "Parameter \"LPM_WIDTHA\" = \"2\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109325 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHB 9 " "Parameter \"LPM_WIDTHB\" = \"9\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109325 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHP 11 " "Parameter \"LPM_WIDTHP\" = \"11\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109325 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHR 11 " "Parameter \"LPM_WIDTHR\" = \"11\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109325 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHS 1 " "Parameter \"LPM_WIDTHS\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109325 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109325 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INPUT_A_IS_CONSTANT NO " "Parameter \"INPUT_A_IS_CONSTANT\" = \"NO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109325 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INPUT_B_IS_CONSTANT YES " "Parameter \"INPUT_B_IS_CONSTANT\" = \"YES\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109325 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "MAXIMIZE_SPEED 5 " "Parameter \"MAXIMIZE_SPEED\" = \"5\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109325 ""} } { { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 187 -1 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Quartus II" 0 -1 1457454109325 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult0\|multcore:mult_core sobel_core:sobel_core_inst\|lpm_mult:Mult0 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult0\|multcore:mult_core\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult0\"" { } { { "lpm_mult.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_mult.tdf" 307 5 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 187 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109548 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult0\|multcore:mult_core\|mpar_add:padder sobel_core:sobel_core_inst\|lpm_mult:Mult0 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult0\|multcore:mult_core\|mpar_add:padder\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult0\"" { } { { "multcore.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/multcore.tdf" 228 7 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 187 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109693 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult0\|altshift:external_latency_ffs sobel_core:sobel_core_inst\|lpm_mult:Mult0 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult0\|altshift:external_latency_ffs\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult0\"" { } { { "lpm_mult.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_mult.tdf" 350 4 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 187 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109848 ""}
+{ "Info" "ISGN_ELABORATION_HEADER" "sobel_core:sobel_core_inst\|lpm_mult:Mult1 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult1\"" { } { { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 188 -1 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Quartus II" 0 -1 1457454109920 ""}
+{ "Info" "ISGN_MEGAFN_PARAM_TOP" "sobel_core:sobel_core_inst\|lpm_mult:Mult1 " "Instantiated megafunction \"sobel_core:sobel_core_inst\|lpm_mult:Mult1\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHA 3 " "Parameter \"LPM_WIDTHA\" = \"3\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109922 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHB 6 " "Parameter \"LPM_WIDTHB\" = \"6\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109922 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHP 9 " "Parameter \"LPM_WIDTHP\" = \"9\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109922 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHR 9 " "Parameter \"LPM_WIDTHR\" = \"9\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109922 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHS 1 " "Parameter \"LPM_WIDTHS\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109922 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109922 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INPUT_A_IS_CONSTANT NO " "Parameter \"INPUT_A_IS_CONSTANT\" = \"NO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109922 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INPUT_B_IS_CONSTANT YES " "Parameter \"INPUT_B_IS_CONSTANT\" = \"YES\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109922 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "MAXIMIZE_SPEED 5 " "Parameter \"MAXIMIZE_SPEED\" = \"5\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109922 ""} } { { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 188 -1 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Quartus II" 0 -1 1457454109922 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult1\|multcore:mult_core sobel_core:sobel_core_inst\|lpm_mult:Mult1 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult1\|multcore:mult_core\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult1\"" { } { { "lpm_mult.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_mult.tdf" 307 5 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 188 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109944 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult1\|multcore:mult_core\|mpar_add:padder sobel_core:sobel_core_inst\|lpm_mult:Mult1 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult1\|multcore:mult_core\|mpar_add:padder\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult1\"" { } { { "multcore.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/multcore.tdf" 228 7 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 188 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109960 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult1\|altshift:external_latency_ffs sobel_core:sobel_core_inst\|lpm_mult:Mult1 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult1\|altshift:external_latency_ffs\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult1\"" { } { { "lpm_mult.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_mult.tdf" 350 4 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 188 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454109977 ""}
+{ "Info" "ISGN_ELABORATION_HEADER" "sobel_core:sobel_core_inst\|lpm_mult:Mult7 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult7\"" { } { { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 615 -1 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Quartus II" 0 -1 1457454110056 ""}
+{ "Info" "ISGN_MEGAFN_PARAM_TOP" "sobel_core:sobel_core_inst\|lpm_mult:Mult7 " "Instantiated megafunction \"sobel_core:sobel_core_inst\|lpm_mult:Mult7\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHA 2 " "Parameter \"LPM_WIDTHA\" = \"2\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110056 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHB 13 " "Parameter \"LPM_WIDTHB\" = \"13\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110056 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHP 15 " "Parameter \"LPM_WIDTHP\" = \"15\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110056 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHR 15 " "Parameter \"LPM_WIDTHR\" = \"15\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110056 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHS 1 " "Parameter \"LPM_WIDTHS\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110056 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110056 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INPUT_A_IS_CONSTANT NO " "Parameter \"INPUT_A_IS_CONSTANT\" = \"NO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110056 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INPUT_B_IS_CONSTANT YES " "Parameter \"INPUT_B_IS_CONSTANT\" = \"YES\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110056 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "MAXIMIZE_SPEED 6 " "Parameter \"MAXIMIZE_SPEED\" = \"6\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110056 ""} } { { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 615 -1 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Quartus II" 0 -1 1457454110056 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult7\|multcore:mult_core sobel_core:sobel_core_inst\|lpm_mult:Mult7 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult7\|multcore:mult_core\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult7\"" { } { { "lpm_mult.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_mult.tdf" 307 5 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 615 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110090 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult7\|multcore:mult_core\|mpar_add:padder sobel_core:sobel_core_inst\|lpm_mult:Mult7 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult7\|multcore:mult_core\|mpar_add:padder\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult7\"" { } { { "multcore.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/multcore.tdf" 228 7 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 615 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110113 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult7\|altshift:external_latency_ffs sobel_core:sobel_core_inst\|lpm_mult:Mult7 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult7\|altshift:external_latency_ffs\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult7\"" { } { { "lpm_mult.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_mult.tdf" 350 4 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 615 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110133 ""}
+{ "Info" "ISGN_ELABORATION_HEADER" "sobel_core:sobel_core_inst\|lpm_mult:Mult5 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult5\"" { } { { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 605 -1 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Quartus II" 0 -1 1457454110207 ""}
+{ "Info" "ISGN_MEGAFN_PARAM_TOP" "sobel_core:sobel_core_inst\|lpm_mult:Mult5 " "Instantiated megafunction \"sobel_core:sobel_core_inst\|lpm_mult:Mult5\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHA 4 " "Parameter \"LPM_WIDTHA\" = \"4\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110207 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHB 9 " "Parameter \"LPM_WIDTHB\" = \"9\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110207 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHP 13 " "Parameter \"LPM_WIDTHP\" = \"13\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110207 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHR 13 " "Parameter \"LPM_WIDTHR\" = \"13\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110207 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHS 1 " "Parameter \"LPM_WIDTHS\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110207 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110207 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INPUT_A_IS_CONSTANT NO " "Parameter \"INPUT_A_IS_CONSTANT\" = \"NO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110207 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INPUT_B_IS_CONSTANT YES " "Parameter \"INPUT_B_IS_CONSTANT\" = \"YES\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110207 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "MAXIMIZE_SPEED 5 " "Parameter \"MAXIMIZE_SPEED\" = \"5\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110207 ""} } { { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 605 -1 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Quartus II" 0 -1 1457454110207 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult5\|multcore:mult_core sobel_core:sobel_core_inst\|lpm_mult:Mult5 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult5\|multcore:mult_core\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult5\"" { } { { "lpm_mult.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_mult.tdf" 307 5 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 605 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110255 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult5\|multcore:mult_core\|mpar_add:padder sobel_core:sobel_core_inst\|lpm_mult:Mult5 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult5\|multcore:mult_core\|mpar_add:padder\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult5\"" { } { { "multcore.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/multcore.tdf" 228 7 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 605 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110280 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult5\|altshift:external_latency_ffs sobel_core:sobel_core_inst\|lpm_mult:Mult5 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult5\|altshift:external_latency_ffs\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult5\"" { } { { "lpm_mult.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_mult.tdf" 350 4 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 605 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110312 ""}
+{ "Info" "ISGN_ELABORATION_HEADER" "sobel_core:sobel_core_inst\|lpm_mult:Mult2 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult2\"" { } { { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 412 -1 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Quartus II" 0 -1 1457454110367 ""}
+{ "Info" "ISGN_MEGAFN_PARAM_TOP" "sobel_core:sobel_core_inst\|lpm_mult:Mult2 " "Instantiated megafunction \"sobel_core:sobel_core_inst\|lpm_mult:Mult2\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHA 2 " "Parameter \"LPM_WIDTHA\" = \"2\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110367 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHB 14 " "Parameter \"LPM_WIDTHB\" = \"14\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110367 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHP 16 " "Parameter \"LPM_WIDTHP\" = \"16\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110367 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHR 16 " "Parameter \"LPM_WIDTHR\" = \"16\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110367 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHS 1 " "Parameter \"LPM_WIDTHS\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110367 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110367 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INPUT_A_IS_CONSTANT NO " "Parameter \"INPUT_A_IS_CONSTANT\" = \"NO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110367 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INPUT_B_IS_CONSTANT YES " "Parameter \"INPUT_B_IS_CONSTANT\" = \"YES\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110367 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "MAXIMIZE_SPEED 5 " "Parameter \"MAXIMIZE_SPEED\" = \"5\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110367 ""} } { { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 412 -1 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Quartus II" 0 -1 1457454110367 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult2\|multcore:mult_core sobel_core:sobel_core_inst\|lpm_mult:Mult2 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult2\|multcore:mult_core\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult2\"" { } { { "lpm_mult.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_mult.tdf" 307 5 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 412 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110399 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult2\|multcore:mult_core\|mpar_add:padder sobel_core:sobel_core_inst\|lpm_mult:Mult2 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult2\|multcore:mult_core\|mpar_add:padder\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult2\"" { } { { "multcore.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/multcore.tdf" 228 7 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 412 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110432 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult2\|altshift:external_latency_ffs sobel_core:sobel_core_inst\|lpm_mult:Mult2 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult2\|altshift:external_latency_ffs\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult2\"" { } { { "lpm_mult.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_mult.tdf" 350 4 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 412 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110466 ""}
+{ "Info" "ISGN_ELABORATION_HEADER" "sobel_core:sobel_core_inst\|lpm_mult:Mult3 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult3\"" { } { { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 521 -1 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Quartus II" 0 -1 1457454110541 ""}
+{ "Info" "ISGN_MEGAFN_PARAM_TOP" "sobel_core:sobel_core_inst\|lpm_mult:Mult3 " "Instantiated megafunction \"sobel_core:sobel_core_inst\|lpm_mult:Mult3\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHA 4 " "Parameter \"LPM_WIDTHA\" = \"4\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110541 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHB 5 " "Parameter \"LPM_WIDTHB\" = \"5\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110541 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHP 9 " "Parameter \"LPM_WIDTHP\" = \"9\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110541 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHR 9 " "Parameter \"LPM_WIDTHR\" = \"9\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110541 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHS 1 " "Parameter \"LPM_WIDTHS\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110541 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110541 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INPUT_A_IS_CONSTANT NO " "Parameter \"INPUT_A_IS_CONSTANT\" = \"NO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110541 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INPUT_B_IS_CONSTANT YES " "Parameter \"INPUT_B_IS_CONSTANT\" = \"YES\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110541 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "MAXIMIZE_SPEED 5 " "Parameter \"MAXIMIZE_SPEED\" = \"5\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110541 ""} } { { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 521 -1 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Quartus II" 0 -1 1457454110541 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult3\|multcore:mult_core sobel_core:sobel_core_inst\|lpm_mult:Mult3 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult3\|multcore:mult_core\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult3\"" { } { { "lpm_mult.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_mult.tdf" 307 5 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 521 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110584 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult3\|multcore:mult_core\|mpar_add:padder sobel_core:sobel_core_inst\|lpm_mult:Mult3 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult3\|multcore:mult_core\|mpar_add:padder\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult3\"" { } { { "multcore.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/multcore.tdf" 228 7 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 521 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110603 ""}
+{ "Info" "ISGN_ELABORATION_HEADER" "sobel_core:sobel_core_inst\|lpm_mult:Mult6 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult6\"" { } { { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 612 -1 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Quartus II" 0 -1 1457454110696 ""}
+{ "Info" "ISGN_MEGAFN_PARAM_TOP" "sobel_core:sobel_core_inst\|lpm_mult:Mult6 " "Instantiated megafunction \"sobel_core:sobel_core_inst\|lpm_mult:Mult6\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHA 3 " "Parameter \"LPM_WIDTHA\" = \"3\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110696 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHB 7 " "Parameter \"LPM_WIDTHB\" = \"7\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110696 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHP 10 " "Parameter \"LPM_WIDTHP\" = \"10\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110696 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHR 10 " "Parameter \"LPM_WIDTHR\" = \"10\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110696 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHS 1 " "Parameter \"LPM_WIDTHS\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110696 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110696 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INPUT_A_IS_CONSTANT NO " "Parameter \"INPUT_A_IS_CONSTANT\" = \"NO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110696 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INPUT_B_IS_CONSTANT YES " "Parameter \"INPUT_B_IS_CONSTANT\" = \"YES\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110696 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "MAXIMIZE_SPEED 5 " "Parameter \"MAXIMIZE_SPEED\" = \"5\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110696 ""} } { { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 612 -1 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Quartus II" 0 -1 1457454110696 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult6\|multcore:mult_core sobel_core:sobel_core_inst\|lpm_mult:Mult6 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult6\|multcore:mult_core\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult6\"" { } { { "lpm_mult.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_mult.tdf" 307 5 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 612 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110756 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult6\|multcore:mult_core\|mpar_add:padder sobel_core:sobel_core_inst\|lpm_mult:Mult6 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult6\|multcore:mult_core\|mpar_add:padder\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult6\"" { } { { "multcore.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/multcore.tdf" 228 7 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 612 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110815 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult6\|altshift:external_latency_ffs sobel_core:sobel_core_inst\|lpm_mult:Mult6 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult6\|altshift:external_latency_ffs\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult6\"" { } { { "lpm_mult.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_mult.tdf" 350 4 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 612 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110848 ""}
+{ "Info" "ISGN_ELABORATION_HEADER" "sobel_core:sobel_core_inst\|lpm_mult:Mult4 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult4\"" { } { { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 601 -1 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Quartus II" 0 -1 1457454110915 ""}
+{ "Info" "ISGN_MEGAFN_PARAM_TOP" "sobel_core:sobel_core_inst\|lpm_mult:Mult4 " "Instantiated megafunction \"sobel_core:sobel_core_inst\|lpm_mult:Mult4\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHA 4 " "Parameter \"LPM_WIDTHA\" = \"4\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110915 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHB 7 " "Parameter \"LPM_WIDTHB\" = \"7\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110915 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHP 11 " "Parameter \"LPM_WIDTHP\" = \"11\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110915 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHR 11 " "Parameter \"LPM_WIDTHR\" = \"11\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110915 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHS 1 " "Parameter \"LPM_WIDTHS\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110915 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110915 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INPUT_A_IS_CONSTANT NO " "Parameter \"INPUT_A_IS_CONSTANT\" = \"NO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110915 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INPUT_B_IS_CONSTANT YES " "Parameter \"INPUT_B_IS_CONSTANT\" = \"YES\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110915 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "MAXIMIZE_SPEED 5 " "Parameter \"MAXIMIZE_SPEED\" = \"5\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110915 ""} } { { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 601 -1 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Quartus II" 0 -1 1457454110915 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult4\|multcore:mult_core sobel_core:sobel_core_inst\|lpm_mult:Mult4 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult4\|multcore:mult_core\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult4\"" { } { { "lpm_mult.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_mult.tdf" 307 5 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 601 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110956 ""}
+{ "Info" "ISGN_MEGAFN_DESCENDANT" "sobel_core:sobel_core_inst\|lpm_mult:Mult4\|multcore:mult_core\|mpar_add:padder sobel_core:sobel_core_inst\|lpm_mult:Mult4 " "Elaborated megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult4\|multcore:mult_core\|mpar_add:padder\", which is child of megafunction instantiation \"sobel_core:sobel_core_inst\|lpm_mult:Mult4\"" { } { { "multcore.tdf" "" { Text "c:/altera/13.0sp1/quartus/libraries/megafunctions/multcore.tdf" 228 7 0 } } { "sobel.v" "" { Text "//icnas3.cc.ic.ac.uk/mg3115/EIE1 FPGA/Sobel Filter Catapult/Sobel/Sobel Quartus/sobel.v" 601 -1 0 } } } 0 12131 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "Quartus II" 0 -1 1457454110985 ""}
+{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" { } { } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Quartus II" 0 -1 1457454112691 ""}
+{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" { } { } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Quartus II" 0 -1 1457454114662 ""} } { } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Quartus II" 0 -1 1457454114662 ""}
+{ "Info" "ICUT_CUT_TM_SUMMARY" "2188 " "Implemented 2188 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "93 " "Implemented 93 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Quartus II" 0 -1 1457454115182 ""} { "Info" "ICUT_CUT_TM_OPINS" "30 " "Implemented 30 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Quartus II" 0 -1 1457454115182 ""} { "Info" "ICUT_CUT_TM_LCELLS" "2065 " "Implemented 2065 logic cells" { } { } 0 21061 "Implemented %1!d! logic cells" 0 0 "Quartus II" 0 -1 1457454115182 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Quartus II" 0 -1 1457454115182 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 1 Quartus II 64-Bit " "Quartus II 64-Bit Analysis & Synthesis was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "499 " "Peak virtual memory: 499 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1457454115376 ""} { "Info" "IQEXE_END_BANNER_TIME" "Tue Mar 08 16:21:55 2016 " "Processing ended: Tue Mar 08 16:21:55 2016" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1457454115376 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:16 " "Elapsed time: 00:00:16" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1457454115376 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:07 " "Total CPU time (on all processors): 00:00:07" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1457454115376 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1457454115376 ""}