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Diffstat (limited to 'Sobel/sobel.v4/rtl.rpt')
| -rw-r--r-- | Sobel/sobel.v4/rtl.rpt | 877 |
1 files changed, 877 insertions, 0 deletions
diff --git a/Sobel/sobel.v4/rtl.rpt b/Sobel/sobel.v4/rtl.rpt new file mode 100644 index 0000000..f38a9bd --- /dev/null +++ b/Sobel/sobel.v4/rtl.rpt @@ -0,0 +1,877 @@ +-- Catapult University Version: Report +-- ---------------------------- --------------------------------------------------- +-- Version: 2011a.126 Production Release +-- Build Date: Wed Aug 8 00:52:07 PDT 2012 + +-- Generated by: mg3115@EEWS104A-013 +-- Generated date: Tue Mar 08 14:22:40 +0000 2016 + +Solution Settings: sobel.v4 + Current state: extract + Project: Sobel + + Design Input Files Specified + $PROJECT_HOME/sobel.h + $MGC_HOME/shared/include/ac_int.h + $PROJECT_HOME/bmp_io.cpp + $PROJECT_HOME/bmp_io.h + $PROJECT_HOME/tb_blur.cpp + $MGC_HOME/shared/include/mc_testbench.h + $MGC_HOME/shared/include/mc_scverify.h + $MGC_HOME/shared/include/ac_int.h + $PROJECT_HOME/sobel.h + $PROJECT_HOME/bmp_io.h + $PROJECT_HOME/bmp_io.h + $PROJECT_HOME/shift_class.h + $PROJECT_HOME/sobel.cpp + $MGC_HOME/shared/include/ac_fixed.h + $MGC_HOME/shared/include/ac_int.h + $PROJECT_HOME/sobel.h + $PROJECT_HOME/shift_class.h + + Processes/Blocks in Design + Process Real Operation(s) count Latency Throughput Reset Length II Comments + ------------- ----------------------- ------- ---------- ------------ -- -------- + /sobel/core 161 921601 921600 0 1 + Design Total: 161 921601 921600 0 0 + + Bill Of Materials (Datapath) + Component Name Area Score Area(DSP_block_9-bit_elems) Area(LUTs) Delay Post Alloc Post Assign + --------------------------------------- ---------- --------------------------- ---------- ----- ---------- ----------- + [Lib: mgc_Altera-Cyclone-III-6_beh_psr] + mgc_add(10,0,10,0,10) 11.241 0.000 11.241 1.301 1 1 + mgc_add(11,1,11,1,12) 12.000 0.000 12.000 1.206 6 9 + mgc_add(12,1,12,1,13) 13.000 0.000 13.000 1.272 5 2 + mgc_add(15,0,11,1,15) 16.000 0.000 16.000 1.633 0 3 + mgc_add(16,0,12,1,16) 17.000 0.000 17.000 1.696 6 6 + mgc_add(16,0,16,0,16) 17.189 0.000 17.189 1.690 3 3 + mgc_add(17,0,13,1,17) 18.000 0.000 18.000 1.758 3 0 + mgc_add(19,0,2,1,19) 20.000 0.000 20.000 1.908 1 1 + mgc_add(2,0,1,0,2) 3.315 0.000 3.315 0.658 0 1 + mgc_add(2,0,1,1,2) 3.000 0.000 3.000 0.658 0 3 + mgc_add(2,0,2,0,2) 3.311 0.000 3.311 0.653 1 1 + mgc_add(3,0,3,0,4) 4.302 0.000 4.302 0.761 3 3 + mgc_add(3,0,3,1,5) 4.000 0.000 4.000 0.436 4 3 + mgc_add(4,0,3,0,5) 5.297 0.000 5.297 0.856 9 9 + mgc_add(4,1,4,1,5) 5.000 0.000 5.000 0.691 0 3 + mgc_add(5,1,5,1,6) 6.000 0.000 6.000 0.775 9 6 + mgc_add(6,0,5,0,6) 7.280 0.000 7.280 1.018 3 3 + mgc_add(6,0,5,1,8) 7.000 0.000 7.000 0.693 3 3 + mgc_add(8,0,7,0,8) 9.262 0.000 9.262 1.165 1 1 + mgc_add(9,0,8,1,10) 10.000 0.000 10.000 1.072 3 3 + mgc_and(1,2) 0.730 0.000 0.730 0.263 0 3 + mgc_and(1,3) 1.054 0.000 1.054 0.416 0 3 + mgc_and(19,2) 13.867 0.000 13.867 0.263 1 1 + mgc_and(2,2) 1.460 0.000 1.460 0.263 2 1 + mgc_mul(2,1,10,1,12) 330.000 2.000 10.000 3.087 6 6 + mgc_mul(3,0,6,0,9) 330.250 2.000 10.250 2.846 3 3 + mgc_mul(3,1,9,0,10) 331.000 2.000 11.000 3.078 1 1 + mgc_mul(3,1,9,0,12) 335.000 2.000 15.000 3.021 2 2 + mgc_mux(1,1,2) 0.919 0.000 0.919 0.369 2 1 + mgc_mux(10,2,4) 22.259 0.000 22.259 0.936 6 6 + mgc_mux(16,1,2) 14.711 0.000 14.711 0.369 6 6 + mgc_mux(19,1,2) 17.469 0.000 17.469 0.369 1 1 + mgc_mux(30,1,2) 27.583 0.000 27.583 0.369 0 1 + mgc_mux(90,1,2) 82.748 0.000 82.748 0.369 3 3 + mgc_nand(1,2) 0.730 0.000 0.730 0.268 0 6 + mgc_nor(1,2) 0.730 0.000 0.730 0.263 0 2 + mgc_not(1) 0.000 0.000 0.000 0.000 0 21 + mgc_not(10) 0.000 0.000 0.000 0.000 0 9 + mgc_not(3) 0.000 0.000 0.000 0.000 0 12 + mgc_or(1,2) 0.730 0.000 0.730 0.268 0 2 + mgc_or(1,3) 1.054 0.000 1.054 0.425 0 1 + mgc_or(1,4) 1.379 0.000 1.379 0.536 0 3 + mgc_or(10,2) 7.298 0.000 7.298 0.268 1 1 + mgc_or(2,2) 1.460 0.000 1.460 0.268 1 0 + mgc_or(30,2) 21.895 0.000 21.895 0.268 1 1 + mgc_reg_pos(1,1,0,0,0,1,1) 0.000 0.000 0.000 0.000 0 4 + mgc_reg_pos(10,1,0,0,0,1,1) 0.000 0.000 0.000 0.000 0 1 + mgc_reg_pos(12,1,0,0,0,1,1) 0.000 0.000 0.000 0.000 0 2 + mgc_reg_pos(16,1,0,0,0,1,1) 0.000 0.000 0.000 0.000 0 6 + mgc_reg_pos(19,1,0,0,0,1,1) 0.000 0.000 0.000 0.000 0 1 + mgc_reg_pos(2,1,0,0,0,1,1) 0.000 0.000 0.000 0.000 0 1 + mgc_reg_pos(30,1,0,0,0,1,1) 0.000 0.000 0.000 0.000 0 1 + mgc_reg_pos(5,1,0,0,0,1,1) 0.000 0.000 0.000 0.000 0 3 + mgc_reg_pos(6,1,0,0,0,1,1) 0.000 0.000 0.000 0.000 0 3 + mgc_reg_pos(9,1,0,0,0,1,1) 0.000 0.000 0.000 0.000 0 3 + mgc_reg_pos(90,1,0,0,0,1,1) 0.000 0.000 0.000 0.000 0 3 + [Lib: mgc_ioport] + mgc_in_wire(1,90) 0.000 0.000 0.000 0.000 1 1 + mgc_out_stdreg(2,30) 0.000 0.000 0.000 0.000 1 1 + + TOTAL AREA (After Assignment): 5138.261 24.000 1298.000 + + Area Scores + Post-Scheduling Post-DP & FSM Post-Assignment + ----------------- --------------- --------------- --------------- + Total Area Score: 5100.4 5393.8 5138.3 + Total Reg: 0.0 0.0 0.0 + + DataPath: 5100.4 (100%) 5393.8 (100%) 5138.3 (100%) + MUX: 489.4 (10%) 770.8 (14%) 516.0 (10%) + FUNC: 4563.6 (89%) 4560.6 (85%) 4559.9 (89%) + LOGIC: 47.4 (1%) 62.4 (1%) 62.4 (1%) + BUFFER: 0.0 0.0 0.0 + MEM: 0.0 0.0 0.0 + ROM: 0.0 0.0 0.0 + REG: 0.0 0.0 0.0 + + + FSM: 0.0 0.0 0.0 + FSM-REG: 0.0 0.0 0.0 + FSM-COMB: 0.0 0.0 0.0 + + + Register-to-Variable Mappings + Register Size(bits) Gated Register CG Opt Done Variables + ------------------------- ---------- -------------- ----------- ----------------------------------------------------- + regs.regs(0).sva 90 Y regs.regs(0).sva + regs.regs(1).sva 90 Y regs.regs(1).sva + regs.regs(2).lpi#1.dfm 90 Y regs.regs(2).lpi#1.dfm + vout:rsc:mgc_out_stdreg.d 30 Y vout:rsc:mgc_out_stdreg.d + FRAME:p#1.lpi#1 19 Y FRAME:p#1.lpi#1 + b(0).sva#1 16 Y b(0).sva#1 + b(2).sva#1 16 Y b(2).sva#1 + g(0).sva#1 16 Y g(0).sva#1 + g(2).sva#1 16 Y g(2).sva#1 + r(0).sva#1 16 Y r(0).sva#1 + r(2).sva#1 16 Y r(2).sva#1 + FRAME:mul#3.itm#1 12 Y FRAME:mul#3.itm#1 + FRAME:mul#5.itm#1 12 Y FRAME:mul#5.itm#1 + FRAME:mul#1.itm#1 10 Y FRAME:mul#1.itm#1 + FRAME:mul#2.itm#1 9 Y FRAME:mul#2.itm#1 + FRAME:mul#4.itm#1 9 Y FRAME:mul#4.itm#1 + FRAME:mul.itm#1 9 Y FRAME:mul.itm#1 + FRAME:slc(blue)#10.itm#1 6 Y FRAME:slc(blue)#10.itm#1 + FRAME:slc(green)#10.itm#1 6 Y FRAME:slc(green)#10.itm#1 + FRAME:slc(red)#10.itm#1 6 Y FRAME:slc(red)#10.itm#1 + FRAME:acc#25.itm#1 5 Y FRAME:acc#25.itm#1 + FRAME:acc#35.itm#1 5 Y FRAME:acc#35.itm#1 + FRAME:acc#40.itm#1 5 Y FRAME:acc#40.itm#1 + i#6.sva#1 2 Y i#6.sva#1 + exit:FRAME#1.sva 1 Y exit:FRAME#1.sva + exit:FRAME.lpi#1.dfm#1 1 Y exit:FRAME.lpi#1.dfm#1 + exit:FRAME:for.sva#1.st#1 1 Y exit:FRAME:for.sva#1.st#1 + main.stage_0#2 1 Y main.stage_0#2 + + Total: 515 515 0 (Total Gating Ratio: 1.00, CG Opt Gating Ratio: 0.00) + + Timing Report + Critical Path + Max Delay: 16.524269 + Slack: 3.4757309999999997 + + Path Startpoint Endpoint Delay Slack + -------------------------------------------------- ----------------------------------------- ---------------------------------- ------- ------- + 1 sobel:core/reg(exit:FRAME:for.sva#1.st#1) sobel:core/reg(FRAME:acc#35.itm#1) 16.5243 3.4757 + + Instance Component Delta Delay + -------- --------- ----- ----- + sobel:core/reg(exit:FRAME:for.sva#1.st#1) mgc_reg_pos_1_1_0_0_0_1_1 0.0000 0.0000 + sobel:core/exit:FRAME:for.sva#1.st#1 0.0000 0.0000 + sobel:core/nor mgc_nor_1_2 0.2625 0.2625 + sobel:core/and.dcpl 0.0000 0.2625 + sobel:core/mux#1 mgc_mux_90_1_2 0.3690 0.6315 + sobel:core/regs.regs(2).lpi#1.dfm:mx0 0.0000 0.6315 + sobel:core/slc(regs.regs(2).lpi#1.dfm:mx0)#5 0.0000 0.6315 + sobel:core/slc(regs.regs(2).lpi#1.dfm:mx0)#5.itm 0.0000 0.6315 + sobel:core/regs.operator[]#15:mux mgc_mux_10_2_4 0.9364 1.5679 + sobel:core/regs.operator[]#15:mux.itm 0.0000 1.5679 + sobel:core/FRAME:for:mul#6 mgc_mul_2_1_10_1_12 3.0868 4.6547 + sobel:core/FRAME:for:mul#6.itm 0.0000 4.6547 + sobel:core/FRAME:for:acc#10 mgc_add_16_0_12_1_16 1.6960 6.3507 + sobel:core/r(2).sva#3 0.0000 6.3507 + sobel:core/slc(r(2).sva#1) 0.0000 6.3507 + sobel:core/slc(r(2).sva#1).itm 0.0000 6.3507 + sobel:core/ACC1:acc#59 mgc_add_15_0_11_1_15 1.6333 7.9840 + sobel:core/ACC1:acc#59.itm 0.0000 7.9840 + sobel:core/ACC1:conc#45 0.0000 7.9840 + sobel:core/ACC1:conc#45.itm 0.0000 7.9840 + sobel:core/ACC2-3:acc#1 mgc_add_16_0_16_0_16 1.6898 9.6738 + sobel:core/red#2.sva 0.0000 9.6738 + sobel:core/slc(red#2.sva)#6 0.0000 9.6738 + sobel:core/slc(red#2.sva)#6.itm 0.0000 9.6738 + sobel:core/FRAME:not#1 mgc_not_3 0.0000 9.6738 + sobel:core/FRAME:not#1.itm 0.0000 9.6738 + sobel:core/FRAME:acc#14 mgc_add_3_0_3_0_4 0.7609 10.4347 + sobel:core/FRAME:acc#14.itm 0.0000 10.4347 + sobel:core/FRAME:acc#15 mgc_add_4_0_3_0_5 0.8564 11.2911 + sobel:core/FRAME:acc#15.itm 0.0000 11.2911 + sobel:core/FRAME:acc#7 mgc_add_6_0_5_0_6 1.0184 12.3095 + sobel:core/FRAME:acc#7.psp.sva 0.0000 12.3095 + sobel:core/slc(FRAME:acc#7.psp.sva)#2 0.0000 12.3095 + sobel:core/slc(FRAME:acc#7.psp.sva)#2.itm 0.0000 12.3095 + sobel:core/conc#154 0.0000 12.3095 + sobel:core/conc#154.itm 0.0000 12.3095 + sobel:core/FRAME:acc#17 mgc_add_5_1_5_1_6 0.7751 13.0846 + sobel:core/FRAME:acc#17.itm 0.0000 13.0846 + sobel:core/FRAME:slc#2 0.0000 13.0846 + sobel:core/FRAME:acc#8.psp.sva 0.0000 13.0846 + sobel:core/slc(FRAME:acc#8.psp.sva)#1 0.0000 13.0846 + sobel:core/slc(FRAME:acc#8.psp.sva)#1.itm 0.0000 13.0846 + sobel:core/FRAME:or mgc_or_1_4 0.5358 13.6203 + sobel:core/FRAME:or.itm 0.0000 13.6203 + sobel:core/and#1 mgc_and_1_3 0.4161 14.0364 + sobel:core/and#1.itm 0.0000 14.0364 + sobel:core/FRAME:conc#79 0.0000 14.0364 + sobel:core/FRAME:conc#79.itm 0.0000 14.0364 + sobel:core/FRAME:acc#33 mgc_add_4_0_3_0_5 0.8564 14.8928 + sobel:core/FRAME:acc#33.itm 0.0000 14.8928 + sobel:core/FRAME:slc#6 0.0000 14.8928 + sobel:core/FRAME:slc#6.itm 0.0000 14.8928 + sobel:core/FRAME:acc#34 mgc_add_4_0_3_0_5 0.8564 15.7492 + sobel:core/FRAME:acc#34.itm 0.0000 15.7492 + sobel:core/FRAME:acc#35 mgc_add_5_1_5_1_6 0.7751 16.5243 + sobel:core/FRAME:acc#35.itm 0.0000 16.5243 + sobel:core/reg(FRAME:acc#35.itm#1) mgc_reg_pos_5_1_0_0_0_1_1 0.0000 16.5243 + + 2 sobel:core/reg(exit:FRAME:for.sva#1.st#1) sobel:core/reg(FRAME:acc#35.itm#1) 16.5243 3.4757 + + Instance Component Delta Delay + -------- --------- ----- ----- + sobel:core/reg(exit:FRAME:for.sva#1.st#1) mgc_reg_pos_1_1_0_0_0_1_1 0.0000 0.0000 + sobel:core/exit:FRAME:for.sva#1.st#1 0.0000 0.0000 + sobel:core/nor mgc_nor_1_2 0.2625 0.2625 + sobel:core/and.dcpl 0.0000 0.2625 + sobel:core/mux#1 mgc_mux_90_1_2 0.3690 0.6315 + sobel:core/regs.regs(2).lpi#1.dfm:mx0 0.0000 0.6315 + sobel:core/slc(regs.regs(2).lpi#1.dfm:mx0)#5 0.0000 0.6315 + sobel:core/slc(regs.regs(2).lpi#1.dfm:mx0)#5.itm 0.0000 0.6315 + sobel:core/regs.operator[]#15:mux mgc_mux_10_2_4 0.9364 1.5679 + sobel:core/regs.operator[]#15:mux.itm 0.0000 1.5679 + sobel:core/FRAME:for:mul#6 mgc_mul_2_1_10_1_12 3.0868 4.6547 + sobel:core/FRAME:for:mul#6.itm 0.0000 4.6547 + sobel:core/FRAME:for:acc#10 mgc_add_16_0_12_1_16 1.6960 6.3507 + sobel:core/r(2).sva#3 0.0000 6.3507 + sobel:core/slc(r(2).sva#1) 0.0000 6.3507 + sobel:core/slc(r(2).sva#1).itm 0.0000 6.3507 + sobel:core/ACC1:acc#59 mgc_add_15_0_11_1_15 1.6333 7.9840 + sobel:core/ACC1:acc#59.itm 0.0000 7.9840 + sobel:core/ACC1:conc#45 0.0000 7.9840 + sobel:core/ACC1:conc#45.itm 0.0000 7.9840 + sobel:core/ACC2-3:acc#1 mgc_add_16_0_16_0_16 1.6898 9.6738 + sobel:core/red#2.sva 0.0000 9.6738 + sobel:core/slc(red#2.sva)#7 0.0000 9.6738 + sobel:core/slc(red#2.sva)#7.itm 0.0000 9.6738 + sobel:core/FRAME:acc#14 mgc_add_3_0_3_0_4 0.7609 10.4347 + sobel:core/FRAME:acc#14.itm 0.0000 10.4347 + sobel:core/FRAME:acc#15 mgc_add_4_0_3_0_5 0.8564 11.2911 + sobel:core/FRAME:acc#15.itm 0.0000 11.2911 + sobel:core/FRAME:acc#7 mgc_add_6_0_5_0_6 1.0184 12.3095 + sobel:core/FRAME:acc#7.psp.sva 0.0000 12.3095 + sobel:core/slc(FRAME:acc#7.psp.sva)#2 0.0000 12.3095 + sobel:core/slc(FRAME:acc#7.psp.sva)#2.itm 0.0000 12.3095 + sobel:core/conc#154 0.0000 12.3095 + sobel:core/conc#154.itm 0.0000 12.3095 + sobel:core/FRAME:acc#17 mgc_add_5_1_5_1_6 0.7751 13.0846 + sobel:core/FRAME:acc#17.itm 0.0000 13.0846 + sobel:core/FRAME:slc#2 0.0000 13.0846 + sobel:core/FRAME:acc#8.psp.sva 0.0000 13.0846 + sobel:core/slc(FRAME:acc#8.psp.sva)#1 0.0000 13.0846 + sobel:core/slc(FRAME:acc#8.psp.sva)#1.itm 0.0000 13.0846 + sobel:core/FRAME:or mgc_or_1_4 0.5358 13.6203 + sobel:core/FRAME:or.itm 0.0000 13.6203 + sobel:core/and#1 mgc_and_1_3 0.4161 14.0364 + sobel:core/and#1.itm 0.0000 14.0364 + sobel:core/FRAME:conc#79 0.0000 14.0364 + sobel:core/FRAME:conc#79.itm 0.0000 14.0364 + sobel:core/FRAME:acc#33 mgc_add_4_0_3_0_5 0.8564 14.8928 + sobel:core/FRAME:acc#33.itm 0.0000 14.8928 + sobel:core/FRAME:slc#6 0.0000 14.8928 + sobel:core/FRAME:slc#6.itm 0.0000 14.8928 + sobel:core/FRAME:acc#34 mgc_add_4_0_3_0_5 0.8564 15.7492 + sobel:core/FRAME:acc#34.itm 0.0000 15.7492 + sobel:core/FRAME:acc#35 mgc_add_5_1_5_1_6 0.7751 16.5243 + sobel:core/FRAME:acc#35.itm 0.0000 16.5243 + sobel:core/reg(FRAME:acc#35.itm#1) mgc_reg_pos_5_1_0_0_0_1_1 0.0000 16.5243 + + 3 sobel:core/reg(exit:FRAME#1.sva) sobel:core/reg(FRAME:acc#35.itm#1) 16.5243 3.4757 + + Instance Component Delta Delay + -------- --------- ----- ----- + sobel:core/reg(exit:FRAME#1.sva) mgc_reg_pos_1_1_0_0_0_1_1 0.0000 0.0000 + sobel:core/exit:FRAME#1.sva 0.0000 0.0000 + sobel:core/nor mgc_nor_1_2 0.2625 0.2625 + sobel:core/and.dcpl 0.0000 0.2625 + sobel:core/mux#1 mgc_mux_90_1_2 0.3690 0.6315 + sobel:core/regs.regs(2).lpi#1.dfm:mx0 0.0000 0.6315 + sobel:core/slc(regs.regs(2).lpi#1.dfm:mx0)#5 0.0000 0.6315 + sobel:core/slc(regs.regs(2).lpi#1.dfm:mx0)#5.itm 0.0000 0.6315 + sobel:core/regs.operator[]#15:mux mgc_mux_10_2_4 0.9364 1.5679 + sobel:core/regs.operator[]#15:mux.itm 0.0000 1.5679 + sobel:core/FRAME:for:mul#6 mgc_mul_2_1_10_1_12 3.0868 4.6547 + sobel:core/FRAME:for:mul#6.itm 0.0000 4.6547 + sobel:core/FRAME:for:acc#10 mgc_add_16_0_12_1_16 1.6960 6.3507 + sobel:core/r(2).sva#3 0.0000 6.3507 + sobel:core/slc(r(2).sva#1) 0.0000 6.3507 + sobel:core/slc(r(2).sva#1).itm 0.0000 6.3507 + sobel:core/ACC1:acc#59 mgc_add_15_0_11_1_15 1.6333 7.9840 + sobel:core/ACC1:acc#59.itm 0.0000 7.9840 + sobel:core/ACC1:conc#45 0.0000 7.9840 + sobel:core/ACC1:conc#45.itm 0.0000 7.9840 + sobel:core/ACC2-3:acc#1 mgc_add_16_0_16_0_16 1.6898 9.6738 + sobel:core/red#2.sva 0.0000 9.6738 + sobel:core/slc(red#2.sva)#7 0.0000 9.6738 + sobel:core/slc(red#2.sva)#7.itm 0.0000 9.6738 + sobel:core/FRAME:acc#14 mgc_add_3_0_3_0_4 0.7609 10.4347 + sobel:core/FRAME:acc#14.itm 0.0000 10.4347 + sobel:core/FRAME:acc#15 mgc_add_4_0_3_0_5 0.8564 11.2911 + sobel:core/FRAME:acc#15.itm 0.0000 11.2911 + sobel:core/FRAME:acc#7 mgc_add_6_0_5_0_6 1.0184 12.3095 + sobel:core/FRAME:acc#7.psp.sva 0.0000 12.3095 + sobel:core/slc(FRAME:acc#7.psp.sva)#2 0.0000 12.3095 + sobel:core/slc(FRAME:acc#7.psp.sva)#2.itm 0.0000 12.3095 + sobel:core/conc#154 0.0000 12.3095 + sobel:core/conc#154.itm 0.0000 12.3095 + sobel:core/FRAME:acc#17 mgc_add_5_1_5_1_6 0.7751 13.0846 + sobel:core/FRAME:acc#17.itm 0.0000 13.0846 + sobel:core/FRAME:slc#2 0.0000 13.0846 + sobel:core/FRAME:acc#8.psp.sva 0.0000 13.0846 + sobel:core/slc(FRAME:acc#8.psp.sva)#1 0.0000 13.0846 + sobel:core/slc(FRAME:acc#8.psp.sva)#1.itm 0.0000 13.0846 + sobel:core/FRAME:or mgc_or_1_4 0.5358 13.6203 + sobel:core/FRAME:or.itm 0.0000 13.6203 + sobel:core/and#1 mgc_and_1_3 0.4161 14.0364 + sobel:core/and#1.itm 0.0000 14.0364 + sobel:core/FRAME:conc#79 0.0000 14.0364 + sobel:core/FRAME:conc#79.itm 0.0000 14.0364 + sobel:core/FRAME:acc#33 mgc_add_4_0_3_0_5 0.8564 14.8928 + sobel:core/FRAME:acc#33.itm 0.0000 14.8928 + sobel:core/FRAME:slc#6 0.0000 14.8928 + sobel:core/FRAME:slc#6.itm 0.0000 14.8928 + sobel:core/FRAME:acc#34 mgc_add_4_0_3_0_5 0.8564 15.7492 + sobel:core/FRAME:acc#34.itm 0.0000 15.7492 + sobel:core/FRAME:acc#35 mgc_add_5_1_5_1_6 0.7751 16.5243 + sobel:core/FRAME:acc#35.itm 0.0000 16.5243 + sobel:core/reg(FRAME:acc#35.itm#1) mgc_reg_pos_5_1_0_0_0_1_1 0.0000 16.5243 + + 4 sobel:core/reg(exit:FRAME:for.sva#1.st#1) sobel:core/reg(FRAME:acc#35.itm#1) 16.5243 3.4757 + + Instance Component Delta Delay + -------- --------- ----- ----- + sobel:core/reg(exit:FRAME:for.sva#1.st#1) mgc_reg_pos_1_1_0_0_0_1_1 0.0000 0.0000 + sobel:core/exit:FRAME:for.sva#1.st#1 0.0000 0.0000 + sobel:core/nor mgc_nor_1_2 0.2625 0.2625 + sobel:core/and.dcpl 0.0000 0.2625 + sobel:core/mux#1 mgc_mux_90_1_2 0.3690 0.6315 + sobel:core/regs.regs(2).lpi#1.dfm:mx0 0.0000 0.6315 + sobel:core/slc(regs.regs(2).lpi#1.dfm:mx0)#5 0.0000 0.6315 + sobel:core/slc(regs.regs(2).lpi#1.dfm:mx0)#5.itm 0.0000 0.6315 + sobel:core/regs.operator[]#15:mux mgc_mux_10_2_4 0.9364 1.5679 + sobel:core/regs.operator[]#15:mux.itm 0.0000 1.5679 + sobel:core/FRAME:for:mul#6 mgc_mul_2_1_10_1_12 3.0868 4.6547 + sobel:core/FRAME:for:mul#6.itm 0.0000 4.6547 + sobel:core/FRAME:for:acc#10 mgc_add_16_0_12_1_16 1.6960 6.3507 + sobel:core/r(2).sva#3 0.0000 6.3507 + sobel:core/slc(r(2).sva#1) 0.0000 6.3507 + sobel:core/slc(r(2).sva#1).itm 0.0000 6.3507 + sobel:core/ACC1:acc#59 mgc_add_15_0_11_1_15 1.6333 7.9840 + sobel:core/ACC1:acc#59.itm 0.0000 7.9840 + sobel:core/ACC1:conc#45 0.0000 7.9840 + sobel:core/ACC1:conc#45.itm 0.0000 7.9840 + sobel:core/ACC2-3:acc#1 mgc_add_16_0_16_0_16 1.6898 9.6738 + sobel:core/red#2.sva 0.0000 9.6738 + sobel:core/slc(red#2.sva)#6 0.0000 9.6738 + sobel:core/slc(red#2.sva)#6.itm 0.0000 9.6738 + sobel:core/FRAME:not#1 mgc_not_3 0.0000 9.6738 + sobel:core/FRAME:not#1.itm 0.0000 9.6738 + sobel:core/FRAME:acc#14 mgc_add_3_0_3_0_4 0.7609 10.4347 + sobel:core/FRAME:acc#14.itm 0.0000 10.4347 + sobel:core/FRAME:acc#15 mgc_add_4_0_3_0_5 0.8564 11.2911 + sobel:core/FRAME:acc#15.itm 0.0000 11.2911 + sobel:core/FRAME:acc#7 mgc_add_6_0_5_0_6 1.0184 12.3095 + sobel:core/FRAME:acc#7.psp.sva 0.0000 12.3095 + sobel:core/slc(FRAME:acc#7.psp.sva)#2 0.0000 12.3095 + sobel:core/slc(FRAME:acc#7.psp.sva)#2.itm 0.0000 12.3095 + sobel:core/conc#154 0.0000 12.3095 + sobel:core/conc#154.itm 0.0000 12.3095 + sobel:core/FRAME:acc#17 mgc_add_5_1_5_1_6 0.7751 13.0846 + sobel:core/FRAME:acc#17.itm 0.0000 13.0846 + sobel:core/FRAME:slc#2 0.0000 13.0846 + sobel:core/FRAME:acc#8.psp.sva 0.0000 13.0846 + sobel:core/slc(FRAME:acc#8.psp.sva)#2 0.0000 13.0846 + sobel:core/slc(FRAME:acc#8.psp.sva)#2.itm 0.0000 13.0846 + sobel:core/FRAME:or mgc_or_1_4 0.5358 13.6203 + sobel:core/FRAME:or.itm 0.0000 13.6203 + sobel:core/and#1 mgc_and_1_3 0.4161 14.0364 + sobel:core/and#1.itm 0.0000 14.0364 + sobel:core/FRAME:conc#79 0.0000 14.0364 + sobel:core/FRAME:conc#79.itm 0.0000 14.0364 + sobel:core/FRAME:acc#33 mgc_add_4_0_3_0_5 0.8564 14.8928 + sobel:core/FRAME:acc#33.itm 0.0000 14.8928 + sobel:core/FRAME:slc#6 0.0000 14.8928 + sobel:core/FRAME:slc#6.itm 0.0000 14.8928 + sobel:core/FRAME:acc#34 mgc_add_4_0_3_0_5 0.8564 15.7492 + sobel:core/FRAME:acc#34.itm 0.0000 15.7492 + sobel:core/FRAME:acc#35 mgc_add_5_1_5_1_6 0.7751 16.5243 + sobel:core/FRAME:acc#35.itm 0.0000 16.5243 + sobel:core/reg(FRAME:acc#35.itm#1) mgc_reg_pos_5_1_0_0_0_1_1 0.0000 16.5243 + + 5 sobel:core/reg(exit:FRAME:for.sva#1.st#1) sobel:core/reg(FRAME:acc#25.itm#1) 16.5243 3.4757 + + Instance Component Delta Delay + -------- --------- ----- ----- + sobel:core/reg(exit:FRAME:for.sva#1.st#1) mgc_reg_pos_1_1_0_0_0_1_1 0.0000 0.0000 + sobel:core/exit:FRAME:for.sva#1.st#1 0.0000 0.0000 + sobel:core/nor mgc_nor_1_2 0.2625 0.2625 + sobel:core/and.dcpl 0.0000 0.2625 + sobel:core/mux#1 mgc_mux_90_1_2 0.3690 0.6315 + sobel:core/regs.regs(2).lpi#1.dfm:mx0 0.0000 0.6315 + sobel:core/slc(regs.regs(2).lpi#1.dfm:mx0)#4 0.0000 0.6315 + sobel:core/slc(regs.regs(2).lpi#1.dfm:mx0)#4.itm 0.0000 0.6315 + sobel:core/regs.operator[]#16:mux mgc_mux_10_2_4 0.9364 1.5679 + sobel:core/regs.operator[]#16:mux.itm 0.0000 1.5679 + sobel:core/FRAME:for:mul#7 mgc_mul_2_1_10_1_12 3.0868 4.6547 + sobel:core/FRAME:for:mul#7.itm 0.0000 4.6547 + sobel:core/FRAME:for:acc#12 mgc_add_16_0_12_1_16 1.6960 6.3507 + sobel:core/g(2).sva#3 0.0000 6.3507 + sobel:core/slc(g(2).sva#1) 0.0000 6.3507 + sobel:core/slc(g(2).sva#1).itm 0.0000 6.3507 + sobel:core/ACC1:acc#63 mgc_add_15_0_11_1_15 1.6333 7.9840 + sobel:core/ACC1:acc#63.itm 0.0000 7.9840 + sobel:core/ACC1:conc#47 0.0000 7.9840 + sobel:core/ACC1:conc#47.itm 0.0000 7.9840 + sobel:core/ACC2-3:acc#2 mgc_add_16_0_16_0_16 1.6898 9.6738 + sobel:core/green#2.sva 0.0000 9.6738 + sobel:core/slc(green#2.sva)#6 0.0000 9.6738 + sobel:core/slc(green#2.sva)#6.itm 0.0000 9.6738 + sobel:core/FRAME:not#10 mgc_not_3 0.0000 9.6738 + sobel:core/FRAME:not#10.itm 0.0000 9.6738 + sobel:core/FRAME:acc#19 mgc_add_3_0_3_0_4 0.7609 10.4347 + sobel:core/FRAME:acc#19.itm 0.0000 10.4347 + sobel:core/FRAME:acc#20 mgc_add_4_0_3_0_5 0.8564 11.2911 + sobel:core/FRAME:acc#20.itm 0.0000 11.2911 + sobel:core/FRAME:acc#9 mgc_add_6_0_5_0_6 1.0184 12.3095 + sobel:core/FRAME:acc#9.psp.sva 0.0000 12.3095 + sobel:core/slc(FRAME:acc#9.psp.sva)#2 0.0000 12.3095 + sobel:core/slc(FRAME:acc#9.psp.sva)#2.itm 0.0000 12.3095 + sobel:core/conc#160 0.0000 12.3095 + sobel:core/conc#160.itm 0.0000 12.3095 + sobel:core/FRAME:acc#22 mgc_add_5_1_5_1_6 0.7751 13.0846 + sobel:core/FRAME:acc#22.itm 0.0000 13.0846 + sobel:core/FRAME:slc#3 0.0000 13.0846 + sobel:core/FRAME:acc#10.psp.sva 0.0000 13.0846 + sobel:core/slc(FRAME:acc#10.psp.sva)#1 0.0000 13.0846 + sobel:core/slc(FRAME:acc#10.psp.sva)#1.itm 0.0000 13.0846 + sobel:core/FRAME:or#1 mgc_or_1_4 0.5358 13.6203 + sobel:core/FRAME:or#1.itm 0.0000 13.6203 + sobel:core/and#3 mgc_and_1_3 0.4161 14.0364 + sobel:core/and#3.itm 0.0000 14.0364 + sobel:core/FRAME:conc#73 0.0000 14.0364 + sobel:core/FRAME:conc#73.itm 0.0000 14.0364 + sobel:core/FRAME:acc#23 mgc_add_4_0_3_0_5 0.8564 14.8928 + sobel:core/FRAME:acc#23.itm 0.0000 14.8928 + sobel:core/FRAME:slc#4 0.0000 14.8928 + sobel:core/FRAME:slc#4.itm 0.0000 14.8928 + sobel:core/FRAME:acc#24 mgc_add_4_0_3_0_5 0.8564 15.7492 + sobel:core/FRAME:acc#24.itm 0.0000 15.7492 + sobel:core/FRAME:acc#25 mgc_add_5_1_5_1_6 0.7751 16.5243 + sobel:core/FRAME:acc#25.itm 0.0000 16.5243 + sobel:core/reg(FRAME:acc#25.itm#1) mgc_reg_pos_5_1_0_0_0_1_1 0.0000 16.5243 + + 6 sobel:core/reg(exit:FRAME:for.sva#1.st#1) sobel:core/reg(FRAME:acc#25.itm#1) 16.5243 3.4757 + + Instance Component Delta Delay + -------- --------- ----- ----- + sobel:core/reg(exit:FRAME:for.sva#1.st#1) mgc_reg_pos_1_1_0_0_0_1_1 0.0000 0.0000 + sobel:core/exit:FRAME:for.sva#1.st#1 0.0000 0.0000 + sobel:core/nor mgc_nor_1_2 0.2625 0.2625 + sobel:core/and.dcpl 0.0000 0.2625 + sobel:core/mux#2 mgc_mux_90_1_2 0.3690 0.6315 + sobel:core/regs.regs(1).sva.dfm:mx0 0.0000 0.6315 + sobel:core/slc(regs.regs(1).sva.dfm:mx0)#1 0.0000 0.6315 + sobel:core/slc(regs.regs(1).sva.dfm:mx0)#1.itm 0.0000 0.6315 + sobel:core/regs.operator[]#16:mux mgc_mux_10_2_4 0.9364 1.5679 + sobel:core/regs.operator[]#16:mux.itm 0.0000 1.5679 + sobel:core/FRAME:for:mul#7 mgc_mul_2_1_10_1_12 3.0868 4.6547 + sobel:core/FRAME:for:mul#7.itm 0.0000 4.6547 + sobel:core/FRAME:for:acc#12 mgc_add_16_0_12_1_16 1.6960 6.3507 + sobel:core/g(2).sva#3 0.0000 6.3507 + sobel:core/slc(g(2).sva#1) 0.0000 6.3507 + sobel:core/slc(g(2).sva#1).itm 0.0000 6.3507 + sobel:core/ACC1:acc#63 mgc_add_15_0_11_1_15 1.6333 7.9840 + sobel:core/ACC1:acc#63.itm 0.0000 7.9840 + sobel:core/ACC1:conc#47 0.0000 7.9840 + sobel:core/ACC1:conc#47.itm 0.0000 7.9840 + sobel:core/ACC2-3:acc#2 mgc_add_16_0_16_0_16 1.6898 9.6738 + sobel:core/green#2.sva 0.0000 9.6738 + sobel:core/slc(green#2.sva)#6 0.0000 9.6738 + sobel:core/slc(green#2.sva)#6.itm 0.0000 9.6738 + sobel:core/FRAME:not#10 mgc_not_3 0.0000 9.6738 + sobel:core/FRAME:not#10.itm 0.0000 9.6738 + sobel:core/FRAME:acc#19 mgc_add_3_0_3_0_4 0.7609 10.4347 + sobel:core/FRAME:acc#19.itm 0.0000 10.4347 + sobel:core/FRAME:acc#20 mgc_add_4_0_3_0_5 0.8564 11.2911 + sobel:core/FRAME:acc#20.itm 0.0000 11.2911 + sobel:core/FRAME:acc#9 mgc_add_6_0_5_0_6 1.0184 12.3095 + sobel:core/FRAME:acc#9.psp.sva 0.0000 12.3095 + sobel:core/slc(FRAME:acc#9.psp.sva)#2 0.0000 12.3095 + sobel:core/slc(FRAME:acc#9.psp.sva)#2.itm 0.0000 12.3095 + sobel:core/conc#160 0.0000 12.3095 + sobel:core/conc#160.itm 0.0000 12.3095 + sobel:core/FRAME:acc#22 mgc_add_5_1_5_1_6 0.7751 13.0846 + sobel:core/FRAME:acc#22.itm 0.0000 13.0846 + sobel:core/FRAME:slc#3 0.0000 13.0846 + sobel:core/FRAME:acc#10.psp.sva 0.0000 13.0846 + sobel:core/slc(FRAME:acc#10.psp.sva)#1 0.0000 13.0846 + sobel:core/slc(FRAME:acc#10.psp.sva)#1.itm 0.0000 13.0846 + sobel:core/FRAME:or#1 mgc_or_1_4 0.5358 13.6203 + sobel:core/FRAME:or#1.itm 0.0000 13.6203 + sobel:core/and#3 mgc_and_1_3 0.4161 14.0364 + sobel:core/and#3.itm 0.0000 14.0364 + sobel:core/FRAME:conc#73 0.0000 14.0364 + sobel:core/FRAME:conc#73.itm 0.0000 14.0364 + sobel:core/FRAME:acc#23 mgc_add_4_0_3_0_5 0.8564 14.8928 + sobel:core/FRAME:acc#23.itm 0.0000 14.8928 + sobel:core/FRAME:slc#4 0.0000 14.8928 + sobel:core/FRAME:slc#4.itm 0.0000 14.8928 + sobel:core/FRAME:acc#24 mgc_add_4_0_3_0_5 0.8564 15.7492 + sobel:core/FRAME:acc#24.itm 0.0000 15.7492 + sobel:core/FRAME:acc#25 mgc_add_5_1_5_1_6 0.7751 16.5243 + sobel:core/FRAME:acc#25.itm 0.0000 16.5243 + sobel:core/reg(FRAME:acc#25.itm#1) mgc_reg_pos_5_1_0_0_0_1_1 0.0000 16.5243 + + 7 sobel:core/reg(exit:FRAME:for.sva#1.st#1) sobel:core/reg(FRAME:acc#35.itm#1) 16.5243 3.4757 + + Instance Component Delta Delay + -------- --------- ----- ----- + sobel:core/reg(exit:FRAME:for.sva#1.st#1) mgc_reg_pos_1_1_0_0_0_1_1 0.0000 0.0000 + sobel:core/exit:FRAME:for.sva#1.st#1 0.0000 0.0000 + sobel:core/nor mgc_nor_1_2 0.2625 0.2625 + sobel:core/and.dcpl 0.0000 0.2625 + sobel:core/mux#1 mgc_mux_90_1_2 0.3690 0.6315 + sobel:core/regs.regs(2).lpi#1.dfm:mx0 0.0000 0.6315 + sobel:core/slc(regs.regs(2).lpi#1.dfm:mx0)#5 0.0000 0.6315 + sobel:core/slc(regs.regs(2).lpi#1.dfm:mx0)#5.itm 0.0000 0.6315 + sobel:core/regs.operator[]#15:mux mgc_mux_10_2_4 0.9364 1.5679 + sobel:core/regs.operator[]#15:mux.itm 0.0000 1.5679 + sobel:core/FRAME:for:mul#6 mgc_mul_2_1_10_1_12 3.0868 4.6547 + sobel:core/FRAME:for:mul#6.itm 0.0000 4.6547 + sobel:core/FRAME:for:acc#10 mgc_add_16_0_12_1_16 1.6960 6.3507 + sobel:core/r(2).sva#3 0.0000 6.3507 + sobel:core/slc(r(2).sva#1) 0.0000 6.3507 + sobel:core/slc(r(2).sva#1).itm 0.0000 6.3507 + sobel:core/ACC1:acc#59 mgc_add_15_0_11_1_15 1.6333 7.9840 + sobel:core/ACC1:acc#59.itm 0.0000 7.9840 + sobel:core/ACC1:conc#45 0.0000 7.9840 + sobel:core/ACC1:conc#45.itm 0.0000 7.9840 + sobel:core/ACC2-3:acc#1 mgc_add_16_0_16_0_16 1.6898 9.6738 + sobel:core/red#2.sva 0.0000 9.6738 + sobel:core/slc(red#2.sva)#6 0.0000 9.6738 + sobel:core/slc(red#2.sva)#6.itm 0.0000 9.6738 + sobel:core/FRAME:not#1 mgc_not_3 0.0000 9.6738 + sobel:core/FRAME:not#1.itm 0.0000 9.6738 + sobel:core/FRAME:acc#14 mgc_add_3_0_3_0_4 0.7609 10.4347 + sobel:core/FRAME:acc#14.itm 0.0000 10.4347 + sobel:core/FRAME:acc#15 mgc_add_4_0_3_0_5 0.8564 11.2911 + sobel:core/FRAME:acc#15.itm 0.0000 11.2911 + sobel:core/FRAME:acc#7 mgc_add_6_0_5_0_6 1.0184 12.3095 + sobel:core/FRAME:acc#7.psp.sva 0.0000 12.3095 + sobel:core/slc(FRAME:acc#7.psp.sva)#3 0.0000 12.3095 + sobel:core/slc(FRAME:acc#7.psp.sva)#3.itm 0.0000 12.3095 + sobel:core/FRAME:not#4 mgc_not_3 0.0000 12.3095 + sobel:core/FRAME:not#4.itm 0.0000 12.3095 + sobel:core/FRAME:conc#67 0.0000 12.3095 + sobel:core/FRAME:conc#67.itm 0.0000 12.3095 + sobel:core/FRAME:acc#17 mgc_add_5_1_5_1_6 0.7751 13.0846 + sobel:core/FRAME:acc#17.itm 0.0000 13.0846 + sobel:core/FRAME:slc#2 0.0000 13.0846 + sobel:core/FRAME:acc#8.psp.sva 0.0000 13.0846 + sobel:core/slc(FRAME:acc#8.psp.sva)#2 0.0000 13.0846 + sobel:core/slc(FRAME:acc#8.psp.sva)#2.itm 0.0000 13.0846 + sobel:core/FRAME:or mgc_or_1_4 0.5358 13.6203 + sobel:core/FRAME:or.itm 0.0000 13.6203 + sobel:core/and#1 mgc_and_1_3 0.4161 14.0364 + sobel:core/and#1.itm 0.0000 14.0364 + sobel:core/FRAME:conc#79 0.0000 14.0364 + sobel:core/FRAME:conc#79.itm 0.0000 14.0364 + sobel:core/FRAME:acc#33 mgc_add_4_0_3_0_5 0.8564 14.8928 + sobel:core/FRAME:acc#33.itm 0.0000 14.8928 + sobel:core/FRAME:slc#6 0.0000 14.8928 + sobel:core/FRAME:slc#6.itm 0.0000 14.8928 + sobel:core/FRAME:acc#34 mgc_add_4_0_3_0_5 0.8564 15.7492 + sobel:core/FRAME:acc#34.itm 0.0000 15.7492 + sobel:core/FRAME:acc#35 mgc_add_5_1_5_1_6 0.7751 16.5243 + sobel:core/FRAME:acc#35.itm 0.0000 16.5243 + sobel:core/reg(FRAME:acc#35.itm#1) mgc_reg_pos_5_1_0_0_0_1_1 0.0000 16.5243 + + 8 sobel:core/reg(exit:FRAME:for.sva#1.st#1) sobel:core/reg(FRAME:acc#40.itm#1) 16.5243 3.4757 + + Instance Component Delta Delay + -------- --------- ----- ----- + sobel:core/reg(exit:FRAME:for.sva#1.st#1) mgc_reg_pos_1_1_0_0_0_1_1 0.0000 0.0000 + sobel:core/exit:FRAME:for.sva#1.st#1 0.0000 0.0000 + sobel:core/nor mgc_nor_1_2 0.2625 0.2625 + sobel:core/and.dcpl 0.0000 0.2625 + sobel:core/mux#1 mgc_mux_90_1_2 0.3690 0.6315 + sobel:core/regs.regs(2).lpi#1.dfm:mx0 0.0000 0.6315 + sobel:core/slc(regs.regs(2).lpi#1.dfm:mx0)#3 0.0000 0.6315 + sobel:core/slc(regs.regs(2).lpi#1.dfm:mx0)#3.itm 0.0000 0.6315 + sobel:core/regs.operator[]#17:mux mgc_mux_10_2_4 0.9364 1.5679 + sobel:core/regs.operator[]#17:mux.itm 0.0000 1.5679 + sobel:core/FRAME:for:mul#8 mgc_mul_2_1_10_1_12 3.0868 4.6547 + sobel:core/FRAME:for:mul#8.itm 0.0000 4.6547 + sobel:core/FRAME:for:acc#14 mgc_add_16_0_12_1_16 1.6960 6.3507 + sobel:core/b(2).sva#3 0.0000 6.3507 + sobel:core/slc(b(2).sva#1) 0.0000 6.3507 + sobel:core/slc(b(2).sva#1).itm 0.0000 6.3507 + sobel:core/ACC1:acc#67 mgc_add_15_0_11_1_15 1.6333 7.9840 + sobel:core/ACC1:acc#67.itm 0.0000 7.9840 + sobel:core/ACC1:conc#49 0.0000 7.9840 + sobel:core/ACC1:conc#49.itm 0.0000 7.9840 + sobel:core/ACC2-3:acc#3 mgc_add_16_0_16_0_16 1.6898 9.6738 + sobel:core/blue#2.sva 0.0000 9.6738 + sobel:core/slc(blue#2.sva)#6 0.0000 9.6738 + sobel:core/slc(blue#2.sva)#6.itm 0.0000 9.6738 + sobel:core/FRAME:not#19 mgc_not_3 0.0000 9.6738 + sobel:core/FRAME:not#19.itm 0.0000 9.6738 + sobel:core/FRAME:acc#29 mgc_add_3_0_3_0_4 0.7609 10.4347 + sobel:core/FRAME:acc#29.itm 0.0000 10.4347 + sobel:core/FRAME:acc#30 mgc_add_4_0_3_0_5 0.8564 11.2911 + sobel:core/FRAME:acc#30.itm 0.0000 11.2911 + sobel:core/FRAME:acc#11 mgc_add_6_0_5_0_6 1.0184 12.3095 + sobel:core/FRAME:acc#11.psp.sva 0.0000 12.3095 + sobel:core/slc(FRAME:acc#11.psp.sva)#2 0.0000 12.3095 + sobel:core/slc(FRAME:acc#11.psp.sva)#2.itm 0.0000 12.3095 + sobel:core/conc#148 0.0000 12.3095 + sobel:core/conc#148.itm 0.0000 12.3095 + sobel:core/FRAME:acc#32 mgc_add_5_1_5_1_6 0.7751 13.0846 + sobel:core/FRAME:acc#32.itm 0.0000 13.0846 + sobel:core/FRAME:slc#5 0.0000 13.0846 + sobel:core/FRAME:acc#12.psp.sva 0.0000 13.0846 + sobel:core/slc(FRAME:acc#12.psp.sva)#1 0.0000 13.0846 + sobel:core/slc(FRAME:acc#12.psp.sva)#1.itm 0.0000 13.0846 + sobel:core/FRAME:or#2 mgc_or_1_4 0.5358 13.6203 + sobel:core/FRAME:or#2.itm 0.0000 13.6203 + sobel:core/and#5 mgc_and_1_3 0.4161 14.0364 + sobel:core/and#5.itm 0.0000 14.0364 + sobel:core/FRAME:conc#82 0.0000 14.0364 + sobel:core/FRAME:conc#82.itm 0.0000 14.0364 + sobel:core/FRAME:acc#38 mgc_add_4_0_3_0_5 0.8564 14.8928 + sobel:core/FRAME:acc#38.itm 0.0000 14.8928 + sobel:core/FRAME:slc#7 0.0000 14.8928 + sobel:core/FRAME:slc#7.itm 0.0000 14.8928 + sobel:core/FRAME:acc#39 mgc_add_4_0_3_0_5 0.8564 15.7492 + sobel:core/FRAME:acc#39.itm 0.0000 15.7492 + sobel:core/FRAME:acc#40 mgc_add_5_1_5_1_6 0.7751 16.5243 + sobel:core/FRAME:acc#40.itm 0.0000 16.5243 + sobel:core/reg(FRAME:acc#40.itm#1) mgc_reg_pos_5_1_0_0_0_1_1 0.0000 16.5243 + + 9 sobel:core/reg(exit:FRAME:for.sva#1.st#1) sobel:core/reg(FRAME:acc#25.itm#1) 16.5243 3.4757 + + Instance Component Delta Delay + -------- --------- ----- ----- + sobel:core/reg(exit:FRAME:for.sva#1.st#1) mgc_reg_pos_1_1_0_0_0_1_1 0.0000 0.0000 + sobel:core/exit:FRAME:for.sva#1.st#1 0.0000 0.0000 + sobel:core/nor mgc_nor_1_2 0.2625 0.2625 + sobel:core/and.dcpl 0.0000 0.2625 + sobel:core/mux#3 mgc_mux_90_1_2 0.3690 0.6315 + sobel:core/regs.regs(0).sva.dfm:mx0 0.0000 0.6315 + sobel:core/slc(regs.regs(0).sva.dfm:mx0)#4 0.0000 0.6315 + sobel:core/slc(regs.regs(0).sva.dfm:mx0)#4.itm 0.0000 0.6315 + sobel:core/regs.operator[]#16:mux mgc_mux_10_2_4 0.9364 1.5679 + sobel:core/regs.operator[]#16:mux.itm 0.0000 1.5679 + sobel:core/FRAME:for:mul#7 mgc_mul_2_1_10_1_12 3.0868 4.6547 + sobel:core/FRAME:for:mul#7.itm 0.0000 4.6547 + sobel:core/FRAME:for:acc#12 mgc_add_16_0_12_1_16 1.6960 6.3507 + sobel:core/g(2).sva#3 0.0000 6.3507 + sobel:core/slc(g(2).sva#1) 0.0000 6.3507 + sobel:core/slc(g(2).sva#1).itm 0.0000 6.3507 + sobel:core/ACC1:acc#63 mgc_add_15_0_11_1_15 1.6333 7.9840 + sobel:core/ACC1:acc#63.itm 0.0000 7.9840 + sobel:core/ACC1:conc#47 0.0000 7.9840 + sobel:core/ACC1:conc#47.itm 0.0000 7.9840 + sobel:core/ACC2-3:acc#2 mgc_add_16_0_16_0_16 1.6898 9.6738 + sobel:core/green#2.sva 0.0000 9.6738 + sobel:core/slc(green#2.sva)#6 0.0000 9.6738 + sobel:core/slc(green#2.sva)#6.itm 0.0000 9.6738 + sobel:core/FRAME:not#10 mgc_not_3 0.0000 9.6738 + sobel:core/FRAME:not#10.itm 0.0000 9.6738 + sobel:core/FRAME:acc#19 mgc_add_3_0_3_0_4 0.7609 10.4347 + sobel:core/FRAME:acc#19.itm 0.0000 10.4347 + sobel:core/FRAME:acc#20 mgc_add_4_0_3_0_5 0.8564 11.2911 + sobel:core/FRAME:acc#20.itm 0.0000 11.2911 + sobel:core/FRAME:acc#9 mgc_add_6_0_5_0_6 1.0184 12.3095 + sobel:core/FRAME:acc#9.psp.sva 0.0000 12.3095 + sobel:core/slc(FRAME:acc#9.psp.sva)#2 0.0000 12.3095 + sobel:core/slc(FRAME:acc#9.psp.sva)#2.itm 0.0000 12.3095 + sobel:core/conc#160 0.0000 12.3095 + sobel:core/conc#160.itm 0.0000 12.3095 + sobel:core/FRAME:acc#22 mgc_add_5_1_5_1_6 0.7751 13.0846 + sobel:core/FRAME:acc#22.itm 0.0000 13.0846 + sobel:core/FRAME:slc#3 0.0000 13.0846 + sobel:core/FRAME:acc#10.psp.sva 0.0000 13.0846 + sobel:core/slc(FRAME:acc#10.psp.sva)#1 0.0000 13.0846 + sobel:core/slc(FRAME:acc#10.psp.sva)#1.itm 0.0000 13.0846 + sobel:core/FRAME:or#1 mgc_or_1_4 0.5358 13.6203 + sobel:core/FRAME:or#1.itm 0.0000 13.6203 + sobel:core/and#3 mgc_and_1_3 0.4161 14.0364 + sobel:core/and#3.itm 0.0000 14.0364 + sobel:core/FRAME:conc#73 0.0000 14.0364 + sobel:core/FRAME:conc#73.itm 0.0000 14.0364 + sobel:core/FRAME:acc#23 mgc_add_4_0_3_0_5 0.8564 14.8928 + sobel:core/FRAME:acc#23.itm 0.0000 14.8928 + sobel:core/FRAME:slc#4 0.0000 14.8928 + sobel:core/FRAME:slc#4.itm 0.0000 14.8928 + sobel:core/FRAME:acc#24 mgc_add_4_0_3_0_5 0.8564 15.7492 + sobel:core/FRAME:acc#24.itm 0.0000 15.7492 + sobel:core/FRAME:acc#25 mgc_add_5_1_5_1_6 0.7751 16.5243 + sobel:core/FRAME:acc#25.itm 0.0000 16.5243 + sobel:core/reg(FRAME:acc#25.itm#1) mgc_reg_pos_5_1_0_0_0_1_1 0.0000 16.5243 + + 10 sobel:core/reg(exit:FRAME:for.sva#1.st#1) sobel:core/reg(FRAME:acc#35.itm#1) 16.5243 3.4757 + + Instance Component Delta Delay + -------- --------- ----- ----- + sobel:core/reg(exit:FRAME:for.sva#1.st#1) mgc_reg_pos_1_1_0_0_0_1_1 0.0000 0.0000 + sobel:core/exit:FRAME:for.sva#1.st#1 0.0000 0.0000 + sobel:core/nor mgc_nor_1_2 0.2625 0.2625 + sobel:core/and.dcpl 0.0000 0.2625 + sobel:core/mux#2 mgc_mux_90_1_2 0.3690 0.6315 + sobel:core/regs.regs(1).sva.dfm:mx0 0.0000 0.6315 + sobel:core/slc(regs.regs(1).sva.dfm:mx0)#2 0.0000 0.6315 + sobel:core/slc(regs.regs(1).sva.dfm:mx0)#2.itm 0.0000 0.6315 + sobel:core/regs.operator[]#15:mux mgc_mux_10_2_4 0.9364 1.5679 + sobel:core/regs.operator[]#15:mux.itm 0.0000 1.5679 + sobel:core/FRAME:for:mul#6 mgc_mul_2_1_10_1_12 3.0868 4.6547 + sobel:core/FRAME:for:mul#6.itm 0.0000 4.6547 + sobel:core/FRAME:for:acc#10 mgc_add_16_0_12_1_16 1.6960 6.3507 + sobel:core/r(2).sva#3 0.0000 6.3507 + sobel:core/slc(r(2).sva#1) 0.0000 6.3507 + sobel:core/slc(r(2).sva#1).itm 0.0000 6.3507 + sobel:core/ACC1:acc#59 mgc_add_15_0_11_1_15 1.6333 7.9840 + sobel:core/ACC1:acc#59.itm 0.0000 7.9840 + sobel:core/ACC1:conc#45 0.0000 7.9840 + sobel:core/ACC1:conc#45.itm 0.0000 7.9840 + sobel:core/ACC2-3:acc#1 mgc_add_16_0_16_0_16 1.6898 9.6738 + sobel:core/red#2.sva 0.0000 9.6738 + sobel:core/slc(red#2.sva)#6 0.0000 9.6738 + sobel:core/slc(red#2.sva)#6.itm 0.0000 9.6738 + sobel:core/FRAME:not#1 mgc_not_3 0.0000 9.6738 + sobel:core/FRAME:not#1.itm 0.0000 9.6738 + sobel:core/FRAME:acc#14 mgc_add_3_0_3_0_4 0.7609 10.4347 + sobel:core/FRAME:acc#14.itm 0.0000 10.4347 + sobel:core/FRAME:acc#15 mgc_add_4_0_3_0_5 0.8564 11.2911 + sobel:core/FRAME:acc#15.itm 0.0000 11.2911 + sobel:core/FRAME:acc#7 mgc_add_6_0_5_0_6 1.0184 12.3095 + sobel:core/FRAME:acc#7.psp.sva 0.0000 12.3095 + sobel:core/slc(FRAME:acc#7.psp.sva)#3 0.0000 12.3095 + sobel:core/slc(FRAME:acc#7.psp.sva)#3.itm 0.0000 12.3095 + sobel:core/FRAME:not#4 mgc_not_3 0.0000 12.3095 + sobel:core/FRAME:not#4.itm 0.0000 12.3095 + sobel:core/FRAME:conc#67 0.0000 12.3095 + sobel:core/FRAME:conc#67.itm 0.0000 12.3095 + sobel:core/FRAME:acc#17 mgc_add_5_1_5_1_6 0.7751 13.0846 + sobel:core/FRAME:acc#17.itm 0.0000 13.0846 + sobel:core/FRAME:slc#2 0.0000 13.0846 + sobel:core/FRAME:acc#8.psp.sva 0.0000 13.0846 + sobel:core/slc(FRAME:acc#8.psp.sva)#2 0.0000 13.0846 + sobel:core/slc(FRAME:acc#8.psp.sva)#2.itm 0.0000 13.0846 + sobel:core/FRAME:or mgc_or_1_4 0.5358 13.6203 + sobel:core/FRAME:or.itm 0.0000 13.6203 + sobel:core/and#1 mgc_and_1_3 0.4161 14.0364 + sobel:core/and#1.itm 0.0000 14.0364 + sobel:core/FRAME:conc#79 0.0000 14.0364 + sobel:core/FRAME:conc#79.itm 0.0000 14.0364 + sobel:core/FRAME:acc#33 mgc_add_4_0_3_0_5 0.8564 14.8928 + sobel:core/FRAME:acc#33.itm 0.0000 14.8928 + sobel:core/FRAME:slc#6 0.0000 14.8928 + sobel:core/FRAME:slc#6.itm 0.0000 14.8928 + sobel:core/FRAME:acc#34 mgc_add_4_0_3_0_5 0.8564 15.7492 + sobel:core/FRAME:acc#34.itm 0.0000 15.7492 + sobel:core/FRAME:acc#35 mgc_add_5_1_5_1_6 0.7751 16.5243 + sobel:core/FRAME:acc#35.itm 0.0000 16.5243 + sobel:core/reg(FRAME:acc#35.itm#1) mgc_reg_pos_5_1_0_0_0_1_1 0.0000 16.5243 + + + Register Input and Register-to-Output Slack + Clock period or pin-to-reg delay constraint (clk): 20.0 + Clock uncertainty constraint (clk) : 0.0 + + Instance Port Slack (Delay) Messages + ----------------------------------------- -------------------------- ------- ------- -------- + sobel:core/reg(vout:rsc:mgc_out_stdreg.d) mux.itm 16.0279 3.9721 + sobel:core/reg(FRAME:mul.itm#1) FRAME:mul.itm 7.4801 12.5199 + sobel:core/reg(FRAME:slc(red)#10.itm#1) slc(red#2.sva)#4.itm 10.3262 9.6738 + sobel:core/reg(FRAME:acc#35.itm#1) FRAME:acc#35.itm 3.4757 16.5243 + sobel:core/reg(FRAME:mul#1.itm#1) FRAME:mul#1.itm 7.2485 12.7515 + sobel:core/reg(FRAME:mul#4.itm#1) FRAME:mul#4.itm 7.4801 12.5199 + sobel:core/reg(FRAME:slc(blue)#10.itm#1) slc(blue#2.sva)#4.itm 10.3262 9.6738 + sobel:core/reg(FRAME:acc#40.itm#1) FRAME:acc#40.itm 3.4757 16.5243 + sobel:core/reg(FRAME:mul#5.itm#1) FRAME:mul#5.itm 7.3052 12.6948 + sobel:core/reg(FRAME:mul#2.itm#1) FRAME:mul#2.itm 7.4801 12.5199 + sobel:core/reg(FRAME:slc(green)#10.itm#1) slc(green#2.sva)#4.itm 10.3262 9.6738 + sobel:core/reg(FRAME:acc#25.itm#1) FRAME:acc#25.itm 3.4757 16.5243 + sobel:core/reg(FRAME:mul#3.itm#1) FRAME:mul#3.itm 7.3052 12.6948 + sobel:core/reg(exit:FRAME:for.sva#1.st#1) FRAME:for:not#7.itm 18.1594 1.8406 + sobel:core/reg(i#6.sva#1) i#6.sva#2 17.5279 2.4721 + sobel:core/reg(exit:FRAME#1.sva) FRAME:and.itm 16.0328 3.9672 + sobel:core/reg(main.stage_0#2) Cn1_1#2 20.0000 0.0000 + sobel:core/reg(regs.regs(2).lpi#1.dfm) regs.regs(2).lpi#1.dfm:mx0 3.4757 16.5243 + sobel:core/reg(regs.regs(1).sva) regs.regs(1).sva.dfm:mx0 3.4757 16.5243 + sobel:core/reg(regs.regs(0).sva) regs.regs(0).sva.dfm:mx0 3.4757 16.5243 + sobel:core/reg(exit:FRAME.lpi#1.dfm#1) exit:FRAME.lpi#1.dfm#1:mx0 16.0328 3.9672 + sobel:core/reg(b(2).sva#1) b(2).sva#3 3.4757 16.5243 + sobel:core/reg(b(0).sva#1) b(0).sva#3 5.1090 14.8910 + sobel:core/reg(g(2).sva#1) g(2).sva#3 3.4757 16.5243 + sobel:core/reg(g(0).sva#1) g(0).sva#3 5.1090 14.8910 + sobel:core/reg(r(2).sva#1) r(2).sva#3 3.4757 16.5243 + sobel:core/reg(r(0).sva#1) r(0).sva#3 5.1090 14.8910 + sobel:core/reg(FRAME:p#1.lpi#1) mux#5.itm 17.4604 2.5396 + sobel vout:rsc.z 20.0000 0.0000 + + Operator Bitwidth Summary + Operation Size (bits) Count + ---------- ----------- ----- + add + - 19 1 + - 16 9 + - 15 3 + - 13 2 + - 12 9 + - 10 4 + - 8 4 + - 6 9 + - 5 15 + - 4 3 + - 2 5 + and + - 3 3 + - 2 5 + mul + - 12 8 + - 10 1 + - 9 3 + mux + - 2 6 + - 1 12 + nand + - 2 6 + nor + - 2 2 + not + - 10 9 + - 3 12 + - 1 21 + or + - 4 3 + - 3 1 + - 2 4 + read_port + - 90 1 + reg + - 90 3 + - 30 1 + - 19 1 + - 16 6 + - 12 2 + - 10 1 + - 9 3 + - 6 3 + - 5 3 + - 2 1 + - 1 4 + write_port + - 30 1 + + End of Report |