rtl.v.psr_timing « sobel.v6 « Sobel - sobel_filter - A sobel filter implementation for FPGAs implemented using Catapult C.

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1 2	`create_clock -domain clk -name clk -period 20.0 -waveform { 0.0 10.0 } clk set_clock_uncertainty -design rtl 0.0 clk`