summaryrefslogtreecommitdiffstats
path: root/student_files_2015/student_files_2015/prj2/quartus_proj/DE0_CAMERA_MOUSE/db/shift_taps_rnn.tdf
blob: 6dece17ecc77ede8997699040ba15058b00c5117 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
--altshift_taps CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone III" NUMBER_OF_TAPS=2 TAP_DISTANCE=1280 WIDTH=12 clken clock shiftin shiftout taps CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48 CYCLONEII_M4K_COMPATIBILITY="ON" LOW_POWER_MODE="AUTO"
--VERSION_BEGIN 13.0 cbx_altdpram 2013:06:12:18:03:43:SJ cbx_altshift_taps 2013:06:12:18:03:43:SJ cbx_altsyncram 2013:06:12:18:03:43:SJ cbx_cycloneii 2013:06:12:18:03:43:SJ cbx_lpm_add_sub 2013:06:12:18:03:43:SJ cbx_lpm_compare 2013:06:12:18:03:43:SJ cbx_lpm_counter 2013:06:12:18:03:43:SJ cbx_lpm_decode 2013:06:12:18:03:43:SJ cbx_lpm_mux 2013:06:12:18:03:43:SJ cbx_mgl 2013:06:12:18:05:10:SJ cbx_stratix 2013:06:12:18:03:43:SJ cbx_stratixii 2013:06:12:18:03:43:SJ cbx_stratixiii 2013:06:12:18:03:43:SJ cbx_stratixv 2013:06:12:18:03:43:SJ cbx_util_mgl 2013:06:12:18:03:43:SJ  VERSION_END


-- Copyright (C) 1991-2013 Altera Corporation
--  Your use of Altera Corporation's design tools, logic functions 
--  and other software and tools, and its AMPP partner logic 
--  functions, and any output files from any of the foregoing 
--  (including device programming or simulation files), and any 
--  associated documentation or information are expressly subject 
--  to the terms and conditions of the Altera Program License 
--  Subscription Agreement, Altera MegaCore Function License 
--  Agreement, or other applicable license agreement, including, 
--  without limitation, that your use is for the sole purpose of 
--  programming logic devices manufactured by Altera and sold by 
--  Altera or its authorized distributors.  Please refer to the 
--  applicable agreement for further details.


FUNCTION altsyncram_lp81 (address_a[10..0], address_b[10..0], clock0, clocken0, data_a[23..0], wren_a)
RETURNS ( q_b[23..0]);
FUNCTION cntr_cuf (clk_en, clock)
RETURNS ( q[10..0]);

--synthesis_resources = lut 11 M9K 6 reg 11 
SUBDESIGN shift_taps_rnn
( 
	clken	:	input;
	clock	:	input;
	shiftin[11..0]	:	input;
	shiftout[11..0]	:	output;
	taps[23..0]	:	output;
) 
VARIABLE 
	altsyncram2 : altsyncram_lp81;
	cntr1 : cntr_cuf;

BEGIN 
	altsyncram2.address_a[] = cntr1.q[];
	altsyncram2.address_b[] = cntr1.q[];
	altsyncram2.clock0 = clock;
	altsyncram2.clocken0 = clken;
	altsyncram2.data_a[] = ( altsyncram2.q_b[11..0], shiftin[]);
	altsyncram2.wren_a = B"1";
	cntr1.clk_en = clken;
	cntr1.clock = clock;
	shiftout[11..0] = altsyncram2.q_b[23..12];
	taps[] = altsyncram2.q_b[];
END;
--VALID FILE