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| author | m8pple <dt10@imperial.ac.uk> | 2015-10-22 03:26:52 +0100 |
|---|---|---|
| committer | m8pple <dt10@imperial.ac.uk> | 2015-10-22 03:26:52 +0100 |
| commit | 969874832d55c00c1c5874ef5ae1fdb82b3ded83 (patch) | |
| tree | 690829e7407b70d8239945859c3a7c01aa3760bc | |
| parent | 8142f166a04ecb103ed503e9c78d862cdbce7678 (diff) | |
| download | MipsCPU-969874832d55c00c1c5874ef5ae1fdb82b3ded83.tar.gz MipsCPU-969874832d55c00c1c5874ef5ae1fdb82b3ded83.zip | |
Modified description of LH and LHU. Thanks to @roastedpork. Closes #8.
| -rw-r--r-- | src/shared/mips_test_framework.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/shared/mips_test_framework.cpp b/src/shared/mips_test_framework.cpp index 61eb695..1528989 100644 --- a/src/shared/mips_test_framework.cpp +++ b/src/shared/mips_test_framework.cpp @@ -56,8 +56,8 @@ static const instr_info_t sg_instructionsArray[]= {"JR","Jump register"}, {"LB","Load byte"}, {"LBU","Load byte unsigned"}, - {"LH","Load word"}, - {"LHU","Load word unsigned"}, + {"LH","Load half-word"}, + {"LHU","Load half-word unsigned"}, {"LUI","Load upper immediate"}, {"LW","Load word"}, {"LWL","Load word left"}, |