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authorxleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e>2013-07-13 14:02:07 +0000
committerxleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e>2013-07-13 14:02:07 +0000
commitf995bde28d1098b51f42a38f3577b903d0420688 (patch)
treefb0bf1845a3dad1cca50331edebdf05f6864f68d /lib/Floats.v
parentbdac1f6aba5370b21b34c9ee12429c3920b3dffb (diff)
downloadcompcert-kvx-f995bde28d1098b51f42a38f3577b903d0420688.tar.gz
compcert-kvx-f995bde28d1098b51f42a38f3577b903d0420688.zip
More accurate model of condition register flags for ARM and IA32.
git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2297 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
Diffstat (limited to 'lib/Floats.v')
-rw-r--r--lib/Floats.v6
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/Floats.v b/lib/Floats.v
index 7ae1705c..94c19d25 100644
--- a/lib/Floats.v
+++ b/lib/Floats.v
@@ -453,6 +453,12 @@ Proof.
now apply cmp_le_lt_eq.
Qed.
+Theorem cmp_lt_gt_false:
+ forall f1 f2, cmp Clt f1 f2 = true -> cmp Cgt f1 f2 = true -> False.
+Proof.
+ unfold cmp; intros; destruct (order_float f1 f2) as [ [] | ]; discriminate.
+Qed.
+
(** Properties of conversions to/from in-memory representation.
The double-precision conversions are bijective (one-to-one).
The single-precision conversions lose precision exactly