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* Merge branch 'mppa-madd' into mppa_postpassDavid Monniaux2019-03-191-7/+28
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| * mul+madd immediateDavid Monniaux2019-03-191-1/+1
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| * mul immediate beginDavid Monniaux2019-03-191-2/+4
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| * fix classes for maddDavid Monniaux2019-03-191-4/+4
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| * mandw mais ça coinceDavid Monniaux2019-03-181-3/+8
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| * maddw exists now in postpass schedulerDavid Monniaux2019-03-181-0/+14
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* | Pseudo instruction for 32 bits division, no code generation yetCyril SIX2019-03-191-1/+2
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* orn / andn in asmDavid Monniaux2019-03-181-4/+18
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* long nand, nor, nxorDavid Monniaux2019-03-161-3/+12
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* nxorDavid Monniaux2019-03-161-3/+6
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* partial norwDavid Monniaux2019-03-161-4/+7
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* nand is implementedDavid Monniaux2019-03-161-2/+7
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* fix problem with ALU reservation tablesDavid Monniaux2019-03-161-1/+3
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* 32-bit rotate finishedDavid Monniaux2019-03-161-3/+5
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* Corrigé certaines latences (Store -> 1 i/o 3, Set -> 4 i/o 3)Cyril SIX2019-03-131-4/+3
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* -fpostpass-ilpDavid Monniaux2019-03-121-2/+4
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* better tracing for ILP + make cleanDavid Monniaux2019-03-121-0/+1
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* Fix for the compw immediate problemCyril SIX2019-03-081-7/+17
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* Reverting the hack introduces on Pcompw etc..Cyril SIX2019-03-081-14/+3
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* HACK for Pcompiw/Pcompil as wellCyril SIX2019-03-071-2/+8
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* HACK for the Pcompw/Pcompl memory problem (but performance decrease, to ↵Cyril SIX2019-03-061-1/+4
| | | | remove later)
* Added double comparisonsCyril SIX2019-03-011-2/+7
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* Implemented float comparisons (no branching yet, and no negation)Cyril SIX2019-03-011-1/+11
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* Ointuofsingle doneCyril SIX2019-03-011-3/+5
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* Float conversion fixes + some more conversionsCyril SIX2019-02-271-3/+15
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* Rajout d'opérateurs flottants, travail sur les tests --> à continuerCyril SIX2019-02-151-6/+39
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* FIX axiom to be realized issueCyril SIX2019-02-151-0/+8
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* Merge branch 'mppa_postpass' of ↵David Monniaux2019-02-131-2/+20
|\ | | | | | | gricad-gitlab.univ-grenoble-alpes.fr:sixcy/CompCert into mppa_postpass
| * Added Olongoffloat, Ofloatoflong and doubleconv testCyril SIX2019-02-121-3/+7
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| * Added Ointofsingle + floatconv unit testCyril SIX2019-02-121-3/+5
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| * Added OsingleofintCyril SIX2019-02-121-1/+5
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| * Added Pmakefs and Pmakef to the schedulerCyril SIX2019-02-121-3/+9
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| * Added Ofloatconst and Osingleconst (not integrated in scheduler yet)Cyril SIX2019-02-121-0/+2
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* | We have one example that exceeds a total latency of 5000, better simply not ↵David Monniaux2019-02-131-1/+1
|/ | | | constrain this limit.
* Fix for immediate size miscomputation in postpass oracle.Cyril SIX2019-02-081-12/+11
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* Added indirect tailcallsCyril SIX2019-02-081-3/+5
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* Adding indirect calls (icall instruction)Cyril SIX2019-01-291-3/+5
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* Added sxwd and zxwd supportCyril SIX2019-01-221-5/+8
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* -O0 will not perform postpass schedulingCyril SIX2019-01-181-1/+1
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* Minor bug in encode_immCyril SIX2019-01-181-2/+2
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* Minor bug fixesCyril SIX2019-01-171-2/+2
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* Corrected a bug in Pallocframe expansion with va_argsCyril SIX2019-01-171-0/+1
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* Merge correctionsCyril SIX2019-01-171-5/+6
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* Corrected a bug in PostlassSchedulingOracle:intlist provoking cyclesCyril SIX2019-01-171-1/+1
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* Added the rest of the instructions info (manually)Cyril SIX2019-01-161-47/+160
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* More instruction definitions in the oracleCyril SIX2019-01-161-11/+34
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* Debugged latency generation. We are able to produce bundlesCyril SIX2019-01-151-23/+78
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* Pfreeframe and Pallocframe raise "OpaqueInstruction". Splitting bb to ↵Cyril SIX2019-01-151-18/+55
| | | | isolate opaque instructions
* Added RA as possible location + control flow infoCyril SIX2019-01-111-6/+12
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* Adding Mem as a possible location for accessesCyril SIX2019-01-111-23/+31
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