aboutsummaryrefslogtreecommitdiffstats
path: root/riscV/Asmgenproof1.v
Commit message (Expand)AuthorAgeFilesLines
* Adding more expansions, improving miniCSE, and tuning prepassLéo Gourdin2021-03-261-4/+8
* Merge remote-tracking branch 'origin/riscv-work' into riscv-work-fpinit-stillexpLéo Gourdin2021-03-061-3/+3
|\
| * Adding a mini CSE pass in the expansion oracleLéo Gourdin2021-03-061-3/+3
* | Asmcondexp branche useful to benchmark expansionsLéo Gourdin2021-03-021-78/+695
|/
* Merge conflicts solved and cleaning in Asmgenproof after expansionLéo Gourdin2021-03-021-747/+87
* Merge remote-tracking branch 'origin/riscV-cmov' into riscv-workLéo Gourdin2021-03-021-0/+48
|\
| * asmgen OselectlDavid Monniaux2021-02-021-0/+4
* | Proof of fsval condition cmp okLéo Gourdin2021-03-011-4/+5
* | Proof of Ocmp expansions without immediate and some drafts in commentLéo Gourdin2021-02-181-1/+1
* | [Admitted checker] Duplicating Asm Ceq/Cne and draft checker proofLéo Gourdin2021-02-111-5/+64
* | [Admitted checker] Checker expansion for reg Ocmp (without scratch)Léo Gourdin2021-02-101-8/+8
* | cond and branches expandedLéo Gourdin2021-02-061-10/+71
* | All Ocmp expanded in RTLLéo Gourdin2021-02-031-6/+6
* | Ccomp for longLéo Gourdin2021-02-031-6/+8
* | Ccompu expansionLéo Gourdin2021-02-021-161/+154
* | Expansion of Ccompimm in RTL [Admitted checker]Léo Gourdin2021-02-021-0/+11
|/
* maketotal mod & divDavid Monniaux2020-09-211-2/+43
* Merge branch 'dm-div2' of https://github.com/monniaux/CompCert into mppa-workDavid Monniaux2020-01-151-16/+29
|\
| * 64-bit signed division by two codeDavid Monniaux2020-01-141-8/+15
| * rv32: 3-instruction signed divide-by-two sequence (as opposed to 4)David Monniaux2020-01-141-8/+14
* | Merge tag 'v3.6_mppa_2019-09-20' of gricad-gitlab.univ-grenoble-alpes.fr:sixc...David Monniaux2019-09-201-20/+4
|\|
| * Fix compile for architectures other than AArch64 (#192)Bernhard Schommer2019-08-171-4/+4
| * AArch64 portXavier Leroy2019-08-081-16/+0
* | fix for Risc-VDavid Monniaux2019-09-071-3/+4
|/
* Move Z definitions out of Integers and into ZbitsXavier Leroy2019-04-261-8/+8
* RISC-V port and assorted changesXavier Leroy2017-04-281-0/+1411
generated by cgit (git 2.34.1) at 2024-06-02 17:59:27 +0000