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riscV
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ValueAOp.v
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Merge remote-tracking branch 'origin/kvx-work' into merge_master_8.13.1
Cyril SIX
2021-06-01
1
-84
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+113
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\
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Removing addptrofs draft, next will be merging
Léo Gourdin
2021-04-09
1
-51
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+47
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Important commit on expansions' mini CSE, and a draft for addptrofs
Léo Gourdin
2021-04-06
1
-65
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+68
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*
a more general way to manage special registers before introducing SP
Léo Gourdin
2021-03-30
1
-49
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+49
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*
Now a more general way to perform imm operations
Léo Gourdin
2021-03-30
1
-13
/
+18
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*
Refactoring the mayundef OP to be more general...
Léo Gourdin
2021-03-30
1
-44
/
+23
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*
Adding more expansions, improving miniCSE, and tuning prepass
Léo Gourdin
2021-03-26
1
-9
/
+56
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*
Adding a mini CSE pass in the expansion oracle
Léo Gourdin
2021-03-06
1
-21
/
+20
*
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replacing omega with lia in some file
Léo Gourdin
2021-03-29
1
-2
/
+2
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/
*
Merge remote-tracking branch 'origin/riscV-cmov' into riscv-work
Léo Gourdin
2021-03-02
1
-0
/
+107
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\
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begin implementing select
David Monniaux
2021-02-02
1
-2
/
+55
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bits to float
David Monniaux
2021-02-01
1
-1
/
+27
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*
Obits_of_single etc
David Monniaux
2021-02-01
1
-0
/
+28
*
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Proof of fsval condition cmp ok
Léo Gourdin
2021-03-01
1
-4
/
+29
*
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[Admitted checker] Duplicating Asm Ceq/Cne and draft checker proof
Léo Gourdin
2021-02-11
1
-21
/
+29
*
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cond and branches expanded
Léo Gourdin
2021-02-06
1
-1
/
+15
*
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All Ocmp expanded in RTL
Léo Gourdin
2021-02-03
1
-0
/
+7
*
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Ccomp for long
Léo Gourdin
2021-02-03
1
-0
/
+57
*
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Ccompu expansion
Léo Gourdin
2021-02-02
1
-2
/
+5
*
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Expansion of Ccompimm in RTL [Admitted checker]
Léo Gourdin
2021-02-02
1
-0
/
+44
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/
*
risc-V now without trapping instructions
David Monniaux
2020-09-21
1
-8
/
+8
*
moved Risc-V div ValueAOp to central location
David Monniaux
2020-09-21
1
-293
/
+0
*
maketotal mod & div
David Monniaux
2020-09-21
1
-8
/
+302
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RISC-V port and assorted changes
Xavier Leroy
2017-04-28
1
-0
/
+218