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* rm "Admitted"David Monniaux2021-07-161-11/+10
* Merge remote-tracking branch 'origin/kvx-work' into kvx-sched-w-reg-pressDavid Monniaux2021-07-163-5/+5
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| * Replacing default notrap load value by Vundef everywherecsix-PhDCyril SIX2021-06-183-5/+5
* | add more debug infonicolas.nardino2021-07-081-2/+10
* | Deactivate sched validator (i think)nicolas.nardino2021-07-081-10/+11
* | Add debug infonicolas.nardino2021-07-061-0/+2
* | Change temporary solution (see prev commits), and add option for itnicolas.nardino2021-06-281-4/+17
* | Changed printfs into debugsnicolas.nardino2021-06-251-6/+5
* | Another schedulernicolas.nardino2021-06-242-0/+203
* | Changed default threshold value following testsnicolas.nardino2021-06-221-8/+2
* | Add option to set thresold and support for riscvnicolas.nardino2021-06-171-2/+7
* | Now working, tests show a decrease in spillagenicolas.nardino2021-06-162-59/+61
* | kinda fixednicolas.nardino2021-06-152-25/+57
* | fixingnicolas.nardino2021-06-153-23/+109
* | was very wrong, fixingnicolas.nardino2021-06-143-15/+72
* | scheduler written, need to test nownicolas.nardino2021-06-141-17/+67
* | work on the schedulernicolas.nardino2021-06-122-40/+110
* | Work on new schedluernicolas.nardino2021-06-103-11/+101
* | Fix RTLpathScheduleraux.get_live_regs_entrynicolas.nardino2021-06-081-2/+3
* | Add some testsnicolas.nardino2021-06-081-1/+1
* | Adding debug infonicolas.nardino2021-06-061-42/+53
* | Fixing scope error, and non-exhaustive pattern matchingnicolas.nardino2021-06-061-5/+6
* | function written, now needs testingnicolas.nardino2021-06-051-10/+40
* | computing live regs at sb entry from its live output regsnicolas.nardino2021-06-041-3/+21
* | Passing info of live regs to scheduler: beginningnicolas.nardino2021-06-043-1/+13
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* Merge remote-tracking branch 'origin/kvx-work' into merge_master_8.13.1Cyril SIX2021-06-017-31/+24
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| * Compatibilité Coq 8.13David Monniaux2021-04-283-8/+3
| * Merge remote-tracking branch 'origin/manuscript' into kvx-worksubmission_OOPSLA2021_AARCH64_KVXCyril SIX2021-04-131-14/+16
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| | * Code simplification of get_path_map (no functionality change)Cyril SIX2021-01-261-14/+16
| * | Remove flagsLéo Gourdin2021-04-091-3/+1
| * | Important commit on expansions' mini CSE, and a draft for addptrofsLéo Gourdin2021-04-062-5/+2
| * | Remove first nop when doing expansionLéo Gourdin2021-03-211-0/+1
| * | Merge remote-tracking branch 'origin/riscv-work' into riscv-work-fpinit-stillexpLéo Gourdin2021-03-062-5/+5
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| | * | Adding a mini CSE pass in the expansion oracleLéo Gourdin2021-03-062-4/+5
| * | | Adding fp init expansionsLéo Gourdin2021-03-021-3/+3
| * | | [Admitted checker] Oracle expansion for float/float32 constant initLéo Gourdin2021-03-022-4/+4
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* / / replacing omega with lia in some fileLéo Gourdin2021-03-294-39/+43
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* | fix ci ?Léo Gourdin2021-03-021-1/+1
* | Try to save values in virtual registers during expansionLéo Gourdin2021-03-011-1/+1
* | Proofs finished for expansionLéo Gourdin2021-03-011-22/+6
* | Debugging fake values finishedLéo Gourdin2021-03-011-10/+19
* | proof of fsval_proj_correctSylvain Boulmé2021-03-011-7/+27
* | Merge remote-tracking branch 'origin/riscv-work-rules' into riscv-workLéo Gourdin2021-03-011-4/+4
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| * | bug fix ?Sylvain Boulmé2021-03-011-4/+4
* | | Proof of fsval condition cmp okLéo Gourdin2021-03-011-968/+18
* | | [Admitted checker] Some more proof, version with buggy addirw0Léo Gourdin2021-02-251-18/+2
* | | some more proof for fake hsval checker expansionsLéo Gourdin2021-02-251-324/+1
* | | [Intermediate] Adding fake hsval for Ccomp expansionLéo Gourdin2021-02-232-164/+68
* | | Fix importsLéo Gourdin2021-02-231-1/+1
* | | Merge remote-tracking branch 'origin/riscv-work-rules' into riscv-workLéo Gourdin2021-02-236-79/+202
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