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author | Clifford Wolf <clifford@clifford.at> | 2016-11-23 03:02:02 +0100 |
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committer | Clifford Wolf <clifford@clifford.at> | 2016-11-23 03:02:02 +0100 |
commit | 117586ff199608e83aad73c1f0657fbe8584a9d3 (patch) | |
tree | f6c5673ba92b83d17d2509e7c7d12b5ab8012baa /Makefile | |
parent | f82af97595c3d8c594927a735e401b3c62d46be2 (diff) | |
download | picorv32-117586ff199608e83aad73c1f0657fbe8584a9d3.tar.gz picorv32-117586ff199608e83aad73c1f0657fbe8584a9d3.zip |
Added RISC-V Formal Interfcae (RVFI)
Diffstat (limited to 'Makefile')
-rw-r--r-- | Makefile | 4 |
1 files changed, 2 insertions, 2 deletions
@@ -41,11 +41,11 @@ test_synth: testbench_synth.vvp firmware/firmware.hex vvp -N testbench_synth.vvp testbench.vvp: testbench.v picorv32.v - iverilog -o testbench.vvp $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) testbench.v picorv32.v + iverilog -o testbench.vvp $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) -DRISCV_FORMAL testbench.v picorv32.v chmod -x testbench.vvp testbench_sp.vvp: testbench.v picorv32.v - iverilog -o testbench_sp.vvp $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) -DSP_TEST testbench.v picorv32.v + iverilog -o testbench_sp.vvp $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) -DRISCV_FORMAL -DSP_TEST testbench.v picorv32.v chmod -x testbench_sp.vvp testbench_synth.vvp: testbench.v synth.v |