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authorClifford Wolf <clifford@clifford.at>2015-11-04 01:12:37 +0100
committerClifford Wolf <clifford@clifford.at>2015-11-04 12:55:33 +0100
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treea1bc875c5705859990b13e3c146a7a2198f50cc8 /README.md
parent8d9f048785a4972fee5817cc64ddb2097034b122 (diff)
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@@ -6,7 +6,7 @@ PicoRV32 is a CPU core that implements the [RISC-V RV32I Instruction Set](http:/
Tools (gcc, binutils, etc..) can be obtained via the [RISC-V Website](http://riscv.org/download.html#tab_tools).
The examples bundled with PicoRV32 (such as the firmware for `make test`) expect a `riscv32-unknown-elf-` toolchain
-(see [build instructions below](#building-a-pure-rv32i-toolchain)) installed in `$PATH`.
+installed in `$PATH` (see [build instructions below](#building-a-pure-rv32i-toolchain)).
PicoRV32 is free and open hardware licensed under the [ISC license](http://en.wikipedia.org/wiki/ISC_license)
(a license that is similar in terms to the MIT license or the 2-clause BSD license).