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| author | John <tom_verbeure@yahoo.com> | 2016-08-29 17:44:00 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2016-08-29 17:44:00 -0700 |
| commit | 9d13c05dd210252e540179c8f1d120c89a26289a (patch) | |
| tree | 01e49f441ddb302522204fa1ab1cc7ef1067c1f6 /README.md | |
| parent | 72158ba4a589cf838b9c474798e4dce9315fa47c (diff) | |
| parent | a6210c06d4c1fef1fb6e72aec7b87a88a6f2f8f4 (diff) | |
| download | picorv32-9d13c05dd210252e540179c8f1d120c89a26289a.tar.gz picorv32-9d13c05dd210252e540179c8f1d120c89a26289a.zip | |
Merge pull request #1 from cliffordwolf/master
Move forward to latest official version
Diffstat (limited to 'README.md')
| -rw-r--r-- | README.md | 24 |
1 files changed, 17 insertions, 7 deletions
@@ -85,13 +85,14 @@ You are reading it right now. This Verilog file contains the following Verilog modules: -| Module | Description | -| ----------------------- | ------------------------------------------------------------- | -| `picorv32` | The PicoRV32 CPU | -| `picorv32_axi` | The version of the CPU with AXI4-Lite interface | -| `picorv32_axi_adapter` | Adapter from PicoRV32 Memory Interface to AXI4-Lite | -| `picorv32_pcpi_mul` | A PCPI core that implements the `MUL[H[SU|U]]` instructions | -| `picorv32_pcpi_div` | A PCPI core that implements the `DIV[U]/REM[U]` instructions | +| Module | Description | +| ------------------------ | --------------------------------------------------------------------- | +| `picorv32` | The PicoRV32 CPU | +| `picorv32_axi` | The version of the CPU with AXI4-Lite interface | +| `picorv32_axi_adapter` | Adapter from PicoRV32 Memory Interface to AXI4-Lite | +| `picorv32_pcpi_mul` | A PCPI core that implements the `MUL[H[SU|U]]` instructions | +| `picorv32_pcpi_fast_mul` | A version of `picorv32_pcpi_fast_mul` using a single cycle multiplier | +| `picorv32_pcpi_div` | A PCPI core that implements the `DIV[U]/REM[U]` instructions | Simply copy this file into your project. @@ -229,6 +230,15 @@ This parameter internally enables PCPI and instantiates the `picorv32_pcpi_mul` core that implements the `MUL[H[SU|U]]` instructions. The external PCPI interface only becomes functional when ENABLE_PCPI is set as well. +#### ENABLE_FAST_MUL (default = 0) + +This parameter internally enables PCPI and instantiates the `picorv32_pcpi_fast_mul` +core that implements the `MUL[H[SU|U]]` instructions. The external PCPI +interface only becomes functional when ENABLE_PCPI is set as well. + +If both ENABLE_MUL and ENABLE_FAST_MUL are set then the ENABLE_MUL setting +will be ignored and the fast multiplier core will be instantiated. + #### ENABLE_DIV (default = 0) This parameter internally enables PCPI and instantiates the `picorv32_pcpi_div` |