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author | Clifford Wolf <clifford@clifford.at> | 2017-09-13 02:24:15 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2017-09-13 02:24:15 +0200 |
commit | 13f93b70009fac1131205477064c36ae54dff1f6 (patch) | |
tree | a429a32c01b254b081f32f1b0e5ab7e7046daf62 /picorv32.v | |
parent | 6ade29cce3f190ce78a65c11f1f9383e95ca36d5 (diff) | |
download | picorv32-13f93b70009fac1131205477064c36ae54dff1f6.tar.gz picorv32-13f93b70009fac1131205477064c36ae54dff1f6.zip |
Revert "Fix RISCV_FORMAL_BLACKBOX_REGS (broke liveness on branch ops)"
This reverts commit 624bc05f989e3fdb3ca499d71a1705d0aac569c5.
Diffstat (limited to 'picorv32.v')
-rw-r--r-- | picorv32.v | 20 |
1 files changed, 10 insertions, 10 deletions
@@ -1301,27 +1301,27 @@ module picorv32 #( end always @(posedge clk) begin - if (resetn && cpuregs_write && latched_rd) begin -`ifndef RISCV_FORMAL_BLACKBOX_REGS + if (resetn && cpuregs_write && latched_rd) cpuregs[latched_rd] <= cpuregs_wrdata; -`else - // blackbox regs on write side because branching instructions - // require a stable value on register read port, abstracting - // on the read port in the block below would be more efficient - // but would require a more complex abstraction. - cpuregs[latched_rd] <= $anyseq; -`endif - end end always @* begin decoded_rs = 'bx; if (ENABLE_REGS_DUALPORT) begin +`ifndef RISCV_FORMAL_BLACKBOX_REGS cpuregs_rs1 = decoded_rs1 ? cpuregs[decoded_rs1] : 0; cpuregs_rs2 = decoded_rs2 ? cpuregs[decoded_rs2] : 0; +`else + cpuregs_rs1 = decoded_rs1 ? $anyseq : 0; + cpuregs_rs2 = decoded_rs2 ? $anyseq : 0; +`endif end else begin decoded_rs = (cpu_state == cpu_state_ld_rs2) ? decoded_rs2 : decoded_rs1; +`ifndef RISCV_FORMAL_BLACKBOX_REGS cpuregs_rs1 = decoded_rs ? cpuregs[decoded_rs] : 0; +`else + cpuregs_rs1 = decoded_rs ? $anyseq : 0; +`endif cpuregs_rs2 = cpuregs_rs1; end end |