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author | Clifford Wolf <clifford@clifford.at> | 2017-04-07 10:05:13 +0200 |
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committer | GitHub <noreply@github.com> | 2017-04-07 10:05:13 +0200 |
commit | 1b22a099f926aeab8668e1e5035a12acbe281e09 (patch) | |
tree | 9cd28c6f671abc92bce148db50507c9ee4bb0390 /picorv32.v | |
parent | 2c6cbcf72f0cdfcf546770280abf6c780cf09ad2 (diff) | |
parent | 7c852571f0d706136e4fd01af76992b919477727 (diff) | |
download | picorv32-1b22a099f926aeab8668e1e5035a12acbe281e09.tar.gz picorv32-1b22a099f926aeab8668e1e5035a12acbe281e09.zip |
Merge pull request #40 from open-design/20170406.wishbone
testbench_wb.v: unify verbose output with axi testbench
Diffstat (limited to 'picorv32.v')
-rw-r--r-- | picorv32.v | 5 |
1 files changed, 3 insertions, 2 deletions
@@ -2610,13 +2610,14 @@ module picorv32_wb #( // Trace Interface output trace_valid, - output [35:0] trace_data + output [35:0] trace_data, + + output mem_instr ); wire mem_valid; wire [31:0] mem_addr; wire [31:0] mem_wdata; wire [ 3:0] mem_wstrb; - wire mem_instr; reg mem_ready; reg [31:0] mem_rdata; |