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| author | Austin Seipp <aseipp@pobox.com> | 2019-01-11 14:54:29 -0600 |
|---|---|---|
| committer | Austin Seipp <aseipp@pobox.com> | 2019-01-11 16:09:07 -0600 |
| commit | 4900ebb6938a7f1720bc5f765c1e7f31ffd35407 (patch) | |
| tree | 6a0ee13f04eff7c0c5c953eebb533c1cccbd03ee /picorv32.v | |
| parent | fc71cadda4310b081fb0dd08b5afdd3270e868f2 (diff) | |
| download | picorv32-4900ebb6938a7f1720bc5f765c1e7f31ffd35407.tar.gz picorv32-4900ebb6938a7f1720bc5f765c1e7f31ffd35407.zip | |
scripts/icestorm: force -march=rv32i
The IceStorm example core doesn't include compressed instructions or the
MULT extension; it is an rv32i core, not rv32i[m|c]. If the given
riscv32 toolchain is not explicitly told to generate rv32i code for the
firmware, it may generate invalid instructions which cause a trap during
simulation or on the hardware itself (although CATCH_ILLINSN is set to
zero in this case, too).
Luckily, any rv32i* toolchain (rv32imc for example) can fit the bill
here -- there's no use of libgcc or anything (which might introduce
illegal instructions generated previously) so just forcing the compiler
to generate the right code works nicely.
Signed-off-by: Austin Seipp <aseipp@pobox.com>
Diffstat (limited to 'picorv32.v')
0 files changed, 0 insertions, 0 deletions