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| author | Clifford Wolf <clifford@clifford.at> | 2016-06-01 12:39:00 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2016-06-01 12:39:00 +0200 |
| commit | 490a7345191f9841fa953d18b27c8485171406ce (patch) | |
| tree | ad169a8341e6cb6cdc5505b40b8c019bbe0f8618 /picorv32.v | |
| parent | fd18475e239f396695d7aed5913d0581f6667110 (diff) | |
| download | picorv32-490a7345191f9841fa953d18b27c8485171406ce.tar.gz picorv32-490a7345191f9841fa953d18b27c8485171406ce.zip | |
Encode in q0 LSB if interrupted instruction is compressed
Diffstat (limited to 'picorv32.v')
| -rw-r--r-- | picorv32.v | 10 |
1 files changed, 7 insertions, 3 deletions
@@ -128,6 +128,7 @@ module picorv32 #( wire [31:0] next_pc; + reg irq_delay; reg irq_active; reg [31:0] irq_mask; reg [31:0] irq_pending; @@ -1093,7 +1094,7 @@ module picorv32 #( clear_prefetched_high_word = COMPRESSED_ISA; end - assign launch_next_insn = cpu_state == cpu_state_fetch && decoder_trigger && (!ENABLE_IRQ || irq_active || !(irq_pending & ~irq_mask)); + assign launch_next_insn = cpu_state == cpu_state_fetch && decoder_trigger && (!ENABLE_IRQ || irq_delay || irq_active || !(irq_pending & ~irq_mask)); always @(posedge clk) begin trap <= 0; @@ -1155,6 +1156,7 @@ module picorv32 #( pcpi_valid <= 0; pcpi_timeout <= 0; irq_active <= 0; + irq_delay <= 0; irq_mask <= ~0; next_irq_pending = 0; irq_state <= 0; @@ -1186,7 +1188,7 @@ module picorv32 #( cpuregs[latched_rd] <= latched_stalu ? alu_out_q : reg_out; end ENABLE_IRQ && irq_state[0]: begin - cpuregs[latched_rd] <= current_pc; + cpuregs[latched_rd] <= current_pc | latched_compr; current_pc = PROGADDR_IRQ; irq_active <= 1; mem_do_rinst <= 1; @@ -1210,10 +1212,11 @@ module picorv32 #( latched_rd <= decoded_rd; latched_compr <= compressed_instr; - if (ENABLE_IRQ && ((decoder_trigger && !irq_active && |(irq_pending & ~irq_mask)) || irq_state)) begin + if (ENABLE_IRQ && ((decoder_trigger && !irq_active && !irq_delay && |(irq_pending & ~irq_mask)) || irq_state)) begin irq_state <= irq_state == 2'b00 ? 2'b01 : irq_state == 2'b01 ? 2'b10 : 2'b00; + latched_compr <= latched_compr; if (ENABLE_IRQ_QREGS) latched_rd <= irqregs_offset | irq_state[0]; else @@ -1230,6 +1233,7 @@ module picorv32 #( end else if (decoder_trigger) begin `debug($display("-- %-0t", $time);) + irq_delay <= irq_active; reg_next_pc <= current_pc + (compressed_instr ? 2 : 4); if (ENABLE_COUNTERS) begin count_instr <= count_instr + 1; |