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author | Clifford Wolf <clifford@clifford.at> | 2016-12-13 17:13:53 +0100 |
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committer | Clifford Wolf <clifford@clifford.at> | 2016-12-13 17:13:53 +0100 |
commit | 72d6f6f72d43b1b7d203219ad509cf8bd7487de3 (patch) | |
tree | 90b2b0b214068bf430dbd3e731737e24fefc091a /picorv32.v | |
parent | 9d6fdda1fa7e3e0472c8033a195eaa90084e6271 (diff) | |
download | picorv32-72d6f6f72d43b1b7d203219ad509cf8bd7487de3.tar.gz picorv32-72d6f6f72d43b1b7d203219ad509cf8bd7487de3.zip |
Added rvfi_post_trap
Diffstat (limited to 'picorv32.v')
-rw-r--r-- | picorv32.v | 4 |
1 files changed, 3 insertions, 1 deletions
@@ -113,6 +113,7 @@ module picorv32 #( output reg [31:0] rvfi_pre_rs2, output reg [31:0] rvfi_post_pc, output reg [31:0] rvfi_post_rd, + output reg rvfi_post_trap, `endif // Trace Interface @@ -1863,13 +1864,14 @@ module picorv32 #( `ifdef RISCV_FORMAL always @(posedge clk) begin - rvfi_valid <= resetn && launch_next_insn && dbg_valid_insn; + rvfi_valid <= resetn && (launch_next_insn || trap) && dbg_valid_insn; rvfi_insn <= dbg_insn_opcode; rvfi_rs1 <= dbg_rs1val_valid ? dbg_insn_rs1 : 0; rvfi_rs2 <= dbg_rs2val_valid ? dbg_insn_rs2 : 0; rvfi_pre_pc <= dbg_insn_addr; rvfi_pre_rs1 <= dbg_rs1val_valid ? dbg_rs1val : 0; rvfi_pre_rs2 <= dbg_rs2val_valid ? dbg_rs2val : 0; + rvfi_post_trap <= trap; if (!resetn) begin rvfi_rd <= 0; |