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| author | Clifford Wolf <clifford@clifford.at> | 2016-11-18 15:36:59 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2016-11-18 15:36:59 +0100 |
| commit | f82af97595c3d8c594927a735e401b3c62d46be2 (patch) | |
| tree | 474d74a197091dbad38d1ed273692116eb031d1c /picorv32.v | |
| parent | bc47b9126031ed572c4c78ae42ce739451a9aa80 (diff) | |
| download | picorv32-f82af97595c3d8c594927a735e401b3c62d46be2.tar.gz picorv32-f82af97595c3d8c594927a735e401b3c62d46be2.zip | |
Another bugfix regarding compressed ISA and unaligned insns
Diffstat (limited to 'picorv32.v')
| -rw-r--r-- | picorv32.v | 4 |
1 files changed, 2 insertions, 2 deletions
@@ -316,7 +316,7 @@ module picorv32 #( assign mem_la_write = resetn && !mem_state && mem_do_wdata; assign mem_la_read = resetn && ((!mem_la_use_prefetched_high_word && !mem_state && (mem_do_rinst || mem_do_prefetch || mem_do_rdata)) || - (COMPRESSED_ISA && mem_xfer && mem_la_firstword && !mem_la_secondword && &mem_rdata_latched[1:0])); + (COMPRESSED_ISA && mem_xfer && (!last_mem_valid ? mem_la_firstword : mem_la_firstword_reg) && !mem_la_secondword && &mem_rdata_latched[1:0])); assign mem_la_addr = (mem_do_prefetch || mem_do_rinst) ? {next_pc[31:2] + mem_la_firstword_xfer, 2'b00} : {reg_op1[31:2], 2'b00}; assign mem_rdata_latched_noshuffle = (mem_xfer || LATCHED_MEM_RDATA) ? mem_rdata : mem_rdata_q; @@ -536,7 +536,7 @@ module picorv32 #( `assert(mem_valid == !mem_la_use_prefetched_high_word); `assert(mem_instr == (mem_do_prefetch || mem_do_rinst)); if (mem_xfer) begin - if (COMPRESSED_ISA && mem_la_read && (!last_mem_valid ? mem_la_firstword : mem_la_firstword_reg)) begin + if (COMPRESSED_ISA && mem_la_read) begin mem_valid <= 1; mem_la_secondword <= 1; if (!mem_la_use_prefetched_high_word) |