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| author | Clifford Wolf <clifford@clifford.at> | 2017-09-16 22:40:53 +0200 |
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| committer | Clifford Wolf <clifford@clifford.at> | 2017-09-16 22:40:53 +0200 |
| commit | 506cda5ee65d3271c3406ecc756f85cedfbeeef6 (patch) | |
| tree | a448236f3fcb724c24521aa6b804946398650d7a /picosoc/README.md | |
| parent | dabebeb0084a541fb16690f600ad153edbc1cbe9 (diff) | |
| download | picorv32-506cda5ee65d3271c3406ecc756f85cedfbeeef6.tar.gz picorv32-506cda5ee65d3271c3406ecc756f85cedfbeeef6.zip | |
Update picosoc README.md
Diffstat (limited to 'picosoc/README.md')
| -rw-r--r-- | picosoc/README.md | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/picosoc/README.md b/picosoc/README.md index b3db5e7..5a6413c 100644 --- a/picosoc/README.md +++ b/picosoc/README.md @@ -19,11 +19,11 @@ and upload them to a connected iCE40-HX8K Breakout Board. | File | Description | | ----------------------------- | --------------------------------------------------------------- | | [picosoc.v](picosoc.v) | Top-level PicoSoC Verilog module | -| [picosoc.v](picosoc.v) | Top-level PicoSoC Verilog module | | [spimemio.v](spimemio.v) | Memory controller that interfaces to external SPI flash | -| [spiflash.v](spiflash.v) | Simulation model of an SPI flash (used by testbench.v) | -| [testbench.v](testbench.v) | Simple test bench for the design (requires firmware.hex). | -| [firmware.s](firmware.s) | Assembler source for firmware.hex/firmware.bin. | +| [simpleuart.v](simpleuart.v) | Simple UART core connected directly to SoC TX/RX lines | +| [start.s](start.s) | Assembler source for firmware.hex/firmware.bin | +| [firmware.c](firmware.c) | C source for firmware.hex/firmware.bin | +| [sections.lds](sections.lds) | Linker script for firmware.hex/firmware.bin | | [hx8kdemo.v](hx8kdemo.v) | FPGA-based example implementation on iCE40-HX8K Breakout Board | | [hx8kdemo.pcf](hx8kdemo.pcf) | Pin constraints for implementation on iCE40-HX8K Breakout Board | |