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authorClifford Wolf <clifford@clifford.at>2015-09-12 14:02:23 +0200
committerClifford Wolf <clifford@clifford.at>2015-09-12 14:02:23 +0200
commit00844092ee97ea69fc9d2e410dc80d148c8291c4 (patch)
treee427ef89b14cf1ab67dcdb98ad973015b2b51810 /scripts/yosys/synth_gates.lib
parent686289adc5ed421fa116e0a695cdc43c746c8539 (diff)
downloadpicorv32-00844092ee97ea69fc9d2e410dc80d148c8291c4.tar.gz
picorv32-00844092ee97ea69fc9d2e410dc80d148c8291c4.zip
Added scripts/yosys/synth_gates
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diff --git a/scripts/yosys/synth_gates.lib b/scripts/yosys/synth_gates.lib
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+library(gates) {
+ cell(NOT) {
+ area: 2; // 7404 hex inverter
+ pin(A) { direction: input; }
+ pin(Y) { direction: output;
+ function: "A'"; }
+ }
+ cell(NAND) {
+ area: 3; // 7400 quad 2-input NAND gate
+ pin(A) { direction: input; }
+ pin(B) { direction: input; }
+ pin(Y) { direction: output;
+ function: "(A*B)'"; }
+ }
+ cell(NOR) {
+ area: 3; // 7402 quad 2-input NOR gate
+ pin(A) { direction: input; }
+ pin(B) { direction: input; }
+ pin(Y) { direction: output;
+ function: "(A+B)'"; }
+ }
+ cell(DFF) {
+ area: 6; // 7474 dual D positive edge triggered flip-flop
+ ff(IQ, IQN) { clocked_on: C;
+ next_state: D; }
+ pin(C) { direction: input;
+ clock: true; }
+ pin(D) { direction: input; }
+ pin(Q) { direction: output;
+ function: "IQ"; }
+ }
+}