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| author | Antony Pavlov <antonynpavlov@gmail.com> | 2017-03-15 06:32:54 +0300 |
|---|---|---|
| committer | Antony Pavlov <antonynpavlov@gmail.com> | 2017-03-15 07:10:37 +0300 |
| commit | 0967a39c1dae7ffd38a70c7eb5ea2a3332784312 (patch) | |
| tree | e39db892a8c88f7d80d78322294de2ae423ab9e6 /testbench_wb.v | |
| parent | 726a76c1cce9aa3c0b55acde01a384641ec0d1f8 (diff) | |
| download | picorv32-0967a39c1dae7ffd38a70c7eb5ea2a3332784312.tar.gz picorv32-0967a39c1dae7ffd38a70c7eb5ea2a3332784312.zip | |
testbench_wb.v: fix output stuff
This patch fixes wishbone testbench output issue:
'DNNE' instead of 'DONE', i.e.
Cycle counter ......... 546536
Instruction counter .... 69770
CPI: 7.83
DNNE
------------------------------------------------------------
EBREAK instruction at 0x000006C4
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Diffstat (limited to 'testbench_wb.v')
| -rw-r--r-- | testbench_wb.v | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/testbench_wb.v b/testbench_wb.v index a613e50..0a1c83f 100644 --- a/testbench_wb.v +++ b/testbench_wb.v @@ -294,14 +294,13 @@ module wb_ram #( reg [31:0] mem [0:depth/4-1] /* verilator public */; always @(posedge wb_clk_i) begin - if (adr_r[aw-1:0] == 32'h1000_0000 && wb_stb_i && !wb_ack_o) - begin - $write("%c", wb_dat_i[7:0]); - end else - if (adr_r[aw-1:0] == 32'h2000_0000 && wb_stb_i && !wb_ack_o) begin - if (wb_dat_i[31:0] == 123456789) - tests_passed = 1; - end + if (ram_we) + if (adr_r[aw-1:0] == 32'h1000_0000) + $write("%c", wb_dat_i[7:0]); + else + if (adr_r[aw-1:0] == 32'h2000_0000) + if (wb_dat_i[31:0] == 123456789) + tests_passed = 1; end always @(posedge wb_clk_i) begin |