diff options
| -rw-r--r-- | Makefile | 2 | ||||
| -rw-r--r-- | README.md | 5 |
2 files changed, 6 insertions, 1 deletions
@@ -9,7 +9,7 @@ FIRMWARE_OBJS = firmware/start.o firmware/irq.o firmware/print.o firmware/sieve. GCC_WARNS = -Werror -Wall -Wextra -Wshadow -Wundef -Wpointer-arith -Wcast-qual -Wcast-align -Wwrite-strings GCC_WARNS += -Wredundant-decls -Wstrict-prototypes -Wmissing-prototypes -pedantic # -Wconversion TOOLCHAIN_PREFIX = /opt/riscv32i/bin/riscv32-unknown-elf- -# COMPRESSED_ISA = C +COMPRESSED_ISA = C test: testbench.exe firmware/firmware.hex vvp -N testbench.exe @@ -185,6 +185,11 @@ the ALU. *Note: Enabling this parameter will be most effective when retiming (aka "register balancing") is enabled in the synthesis flow.* +#### COMPRESSED_ISA (default = 0) + +This enables support for the RISC-V Compressed Instruction Set. Currently +this implements the draft version 1.9 of the compressed ISA specification. + #### CATCH_MISALIGN (default = 1) Set this to 0 to disable the circuitry for catching misaligned memory |