picorv32 - Fork of https://github.com/YosysHQ/picorv32.

	Commit message (Expand)	Author	Age	Files	Lines
*	Removed trailing whitespaces	Clifford Wolf	2015-07-02	1	-2/+2
*	Added CATCH_MISALIGN and CATCH_ILLINSN	Clifford Wolf	2015-07-01	1	-8/+14
*	After some profiling: one-hot FSM encoding	Clifford Wolf	2015-07-01	1	-9/+10
*	Improvements in PCPI MUL core	Clifford Wolf	2015-06-30	1	-10/+15
*	Added LATCHED_IRQ parameter	Clifford Wolf	2015-06-29	1	-1/+4
*	Added ENABLE_IRQ_QREGS and ENABLE_IRQ_TIMER	Clifford Wolf	2015-06-28	1	-12/+21
*	Cleanups in PCPI interface	Clifford Wolf	2015-06-28	1	-62/+43
*	Fixed PCPI instr prefetching	Clifford Wolf	2015-06-28	1	-2/+1
*	Improvements in picorv32_pcpi_mul	Clifford Wolf	2015-06-28	1	-20/+43
*	Moved ENABLE_MUL from picorv32_axi to picorv32	Clifford Wolf	2015-06-28	1	-55/+82
*	Added PCPI to picorv32_axi	Clifford Wolf	2015-06-27	1	-36/+49
*	Implemented picorv32_pcpi_mul	Clifford Wolf	2015-06-27	1	-11/+47
*	Added pcpi_wait interface	Clifford Wolf	2015-06-26	1	-2/+10
*	Added Pico Co-Processor Interface (PCPI)	Clifford Wolf	2015-06-26	1	-13/+206
*	Implemented waitirq instruction	Clifford Wolf	2015-06-26	1	-9/+21
*	Refactoring of IRQ handling	Clifford Wolf	2015-06-26	1	-54/+80
*	Added basic IRQ support	Clifford Wolf	2015-06-25	1	-14/+126
*	Removed unnecessary "jal" complexity	Clifford Wolf	2015-06-09	1	-4/+1
*	Refactored instruction decoder	Clifford Wolf	2015-06-08	1	-169/+212
*	Improved timing for "decoded_imm_uj"	Clifford Wolf	2015-06-07	1	-4/+3
*	Added support for dual-port register file	Clifford Wolf	2015-06-07	1	-4/+22
*	minor optimizations	Clifford Wolf	2015-06-07	1	-5/+7
*	Improved "decoder_trigger" handling	Clifford Wolf	2015-06-07	1	-14/+11
*	Added look-ahead write interface	Clifford Wolf	2015-06-07	1	-18/+14
*	Major redesign of main FSM	Clifford Wolf	2015-06-07	1	-209/+226
*	Added memory "look-ahead" read interface	Clifford Wolf	2015-06-06	1	-13/+13
*	Improved AXI Interface Testbench	Clifford Wolf	2015-06-06	1	-2/+2
*	Initial import	Clifford Wolf	2015-06-06	1	-0/+844