Commit message (Collapse) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Fixed dbg_ signals: no latches (formal verification doesn't like latches) | Clifford Wolf | 2016-04-13 | 1 | -0/+21 |
| | |||||
* | Minor change in DEBUGASM output | Clifford Wolf | 2016-04-13 | 1 | -1/+1 |
| | |||||
* | Added SBREAK handling for CATCH_ILLINSN=0 | Clifford Wolf | 2016-04-13 | 1 | -1/+7 |
| | |||||
* | Streamlined debug signals | Clifford Wolf | 2016-04-13 | 1 | -56/+87 |
| | |||||
* | Some area improvements | Clifford Wolf | 2016-04-13 | 1 | -5/+6 |
| | |||||
* | Use ifdef instead of generate if so we don't confuse Vivado | Clifford Wolf | 2016-04-13 | 1 | -34/+35 |
| | |||||
* | Added (by default disabled) register file access wires for debugging | Clifford Wolf | 2016-04-12 | 1 | -0/+34 |
| | |||||
* | Bugfix for CATCH_ILLINSN <-> WITH_PCPI interaction | Clifford Wolf | 2016-04-12 | 1 | -1/+1 |
| | |||||
* | Added ENABLE_COUNTERS64 config parameter | Clifford Wolf | 2016-04-12 | 1 | -6/+13 |
| | |||||
* | Added BARREL_SHIFTER config parameter | Clifford Wolf | 2016-04-12 | 1 | -7/+19 |
| | |||||
* | Do not re-load a word to read the 16 bit opcode in the upper half | Clifford Wolf | 2016-04-11 | 1 | -14/+44 |
| | |||||
* | Do not load next word when loading a 16 bit opcode from the upper half of a ↵ | Clifford Wolf | 2016-04-11 | 1 | -4/+7 |
| | | | | 32bit word | ||||
* | Fixed signed division by zero handling | Clifford Wolf | 2016-04-10 | 1 | -1/+1 |
| | |||||
* | Added ENABLE_DIV and picorv32_pcpi_div | Clifford Wolf | 2016-04-10 | 1 | -3/+119 |
| | |||||
* | Bugfix in memory interface (related to compressed ISA) | Clifford Wolf | 2016-04-10 | 1 | -3/+3 |
| | |||||
* | Bugfix in C.SRAI implementation | Clifford Wolf | 2016-04-09 | 1 | -1/+1 |
| | |||||
* | Bugfix in C.ADDI4SPN implementation | Clifford Wolf | 2016-04-09 | 1 | -2/+2 |
| | |||||
* | Merge branch 'master' into compressed | Clifford Wolf | 2016-02-03 | 1 | -1/+2 |
|\ | | | | | | | | | Conflicts: picorv32.v | ||||
| * | Cleanup regarding pcpi_timeout | Clifford Wolf | 2015-12-22 | 1 | -0/+1 |
| | | |||||
| * | Keep mem_wstrb low even when mem_valid is low anyways | Clifford Wolf | 2015-12-22 | 1 | -1/+1 |
| | | |||||
* | | Towards compressed ISA support | Clifford Wolf | 2015-11-20 | 1 | -0/+23 |
| | | |||||
* | | Towards compressed ISA support | Clifford Wolf | 2015-11-19 | 1 | -75/+98 |
| | | |||||
* | | Towards compressed ISA support | Clifford Wolf | 2015-11-19 | 1 | -2/+34 |
| | | |||||
* | | Towards compressed ISA support | Clifford Wolf | 2015-11-18 | 1 | -2/+13 |
| | | |||||
* | | Towards compressed ISA support | Clifford Wolf | 2015-11-18 | 1 | -0/+13 |
| | | |||||
* | | Towards compressed ISA support | Clifford Wolf | 2015-11-15 | 1 | -1/+3 |
| | | |||||
* | | Towards compressed ISA support | Clifford Wolf | 2015-11-15 | 1 | -0/+50 |
| | | |||||
* | | Towards compressed ISA support | Clifford Wolf | 2015-11-14 | 1 | -5/+48 |
| | | |||||
* | | Towards compressed ISA support | Clifford Wolf | 2015-11-14 | 1 | -12/+32 |
| | | |||||
* | | Towards compressed ISA support | Clifford Wolf | 2015-11-13 | 1 | -9/+84 |
|/ | |||||
* | Progress in "make check" | Clifford Wolf | 2015-10-15 | 1 | -11/+29 |
| | |||||
* | Added "make check" | Clifford Wolf | 2015-10-14 | 1 | -0/+20 |
| | |||||
* | Reset bugfix (bug found via scripts/smt2-bmc/mem_equiv.*) | Clifford Wolf | 2015-08-13 | 1 | -1/+1 |
| | |||||
* | Refactoring of TWO_CYCLE_ALU | Clifford Wolf | 2015-07-08 | 1 | -143/+117 |
| | |||||
* | Added TWO_CYCLE_ALU parameter | Clifford Wolf | 2015-07-08 | 1 | -52/+124 |
| | |||||
* | Added TWO_CYCLE_COMPARE | Clifford Wolf | 2015-07-07 | 1 | -8/+23 |
| | |||||
* | Added missing LD_RS1 debug statements | Clifford Wolf | 2015-07-02 | 1 | -3/+10 |
| | |||||
* | Being more aggressive with parallel cases | Clifford Wolf | 2015-07-02 | 1 | -145/+173 |
| | |||||
* | Added TWO_STAGE_SHIFT parameter | Clifford Wolf | 2015-07-02 | 1 | -1/+4 |
| | |||||
* | Added `debug macro | Clifford Wolf | 2015-07-02 | 1 | -42/+27 |
| | |||||
* | Removed trailing whitespaces | Clifford Wolf | 2015-07-02 | 1 | -2/+2 |
| | |||||
* | Added CATCH_MISALIGN and CATCH_ILLINSN | Clifford Wolf | 2015-07-01 | 1 | -8/+14 |
| | |||||
* | After some profiling: one-hot FSM encoding | Clifford Wolf | 2015-07-01 | 1 | -9/+10 |
| | |||||
* | Improvements in PCPI MUL core | Clifford Wolf | 2015-06-30 | 1 | -10/+15 |
| | |||||
* | Added LATCHED_IRQ parameter | Clifford Wolf | 2015-06-29 | 1 | -1/+4 |
| | |||||
* | Added ENABLE_IRQ_QREGS and ENABLE_IRQ_TIMER | Clifford Wolf | 2015-06-28 | 1 | -12/+21 |
| | |||||
* | Cleanups in PCPI interface | Clifford Wolf | 2015-06-28 | 1 | -62/+43 |
| | |||||
* | Fixed PCPI instr prefetching | Clifford Wolf | 2015-06-28 | 1 | -2/+1 |
| | |||||
* | Improvements in picorv32_pcpi_mul | Clifford Wolf | 2015-06-28 | 1 | -20/+43 |
| | |||||
* | Moved ENABLE_MUL from picorv32_axi to picorv32 | Clifford Wolf | 2015-06-28 | 1 | -55/+82 |
| |