picorv32 - Fork of https://github.com/YosysHQ/picorv32.

	Commit message (Collapse)	Author	Age	Files	Lines
*	Disable RVC in tests/jal.S and tests/jalr.S	Larry Doolittle	2020-04-23	2	-0/+4
\| \| \| \|	Signed-off-by: Claire Wolf <claire@symbioticeda.com>
*	Update riscv-gnu-toolchain to bf5697a	Clifford Wolf	2017-11-19	1	-1/+1
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*	Remove some trailing whitespace	Larry Doolittle	2017-06-13	1	-2/+2
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*	Update riscv-gnu-toolchain to git rev 914224e	Clifford Wolf	2017-01-13	3	-9/+9
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*	Minor changes and build fixes for new riscv-gnu-toolchain	Clifford Wolf	2016-12-10	2	-12/+0
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*	RISC-V ISA 2.1 now calls "sbreak" officially "ebreak"	Clifford Wolf	2016-06-06	1	-1/+1
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*	Added ENABLE_DIV and picorv32_pcpi_div	Clifford Wolf	2016-04-10	4	-0/+164
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*	Bump riscv-gnu-toolchain version	Clifford Wolf	2015-12-16	2	-127/+4
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*	Removed trailing whitespaces	Clifford Wolf	2015-07-02	1	-2/+2
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*	Added mul tests from riscv-tests	Clifford Wolf	2015-06-27	5	-0/+331
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*	Major redesign of main FSM	Clifford Wolf	2015-06-07	1	-53/+0
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*	Initial import	Clifford Wolf	2015-06-06	41	-0/+3588