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authorYann Herklotz <ymh15@ic.ac.uk>2022-03-31 10:52:04 +0000
committernode <node@git-bridge-prod-0>2022-03-31 11:11:53 +0000
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Update on Overleaf.
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%This design ensures that each individual pass remains relatively simple and hence feasible to prove correct.
The correctness proof of the entire compiler is formed by composing the correctness proofs of each of those passes.
\YHchanged{That the Csmith compiler testing tool}~\cite{csmith} has found hundreds of bugs in GCC and LLVM but none in (the verified parts of) CompCert is a testament to the reliability of this development approach.
-\YHchanged{However, we} cannot guarantee \vericertfun{} designs will never go wrong, because of fallible components not covered by the theorem, such as the synthesis toolchain~\cite{verismith} and the FPGA itself.
+\YHchanged{In \vericertfun{} designs, however, we cannot guarantee that they will never go wrong, because of fallible components not covered by the theorem, such as the synthesis toolchain~\cite{verismith} and the FPGA itself.}
\paragraph{The \vericert{} verified HLS tool}