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authorYann Herklotz <git@yannherklotz.com>2021-09-28 23:49:46 +0100
committerYann Herklotz <git@yannherklotz.com>2021-09-28 23:49:46 +0100
commit074d5cd5b077bbbe81e6cd1c48ae2a63e5b29c62 (patch)
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parent60fd12166b36e4ca86fe9fc688c92515ed2677f7 (diff)
downloadoopsla21_fvhls-074d5cd5b077bbbe81e6cd1c48ae2a63e5b29c62.tar.gz
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#+columns: %45ITEM %10BEAMER_ENV(Env) %10BEAMER_ACT(Act) %4BEAMER_COL(Col)
#+setupfile: setup.org
+** The Need to Design Hardware Accelerators
+
+Field-programmable gate arrays (FPGAs) becoming more popular as flexible hardware acceleration.
+
+Compared to microcontrollers:
+
+- Can greatly *reduce latency*.
+- Lower *power*.
+- *Higher performance*.
+
+But:
+
+- Needs knowledge about hardware design.
+- *Less flexible*.
+
+** So How do we Program an FPGA?
+
+*** Code example :B_column:
+:PROPERTIES:
+:BEAMER_ENV: column
+:BEAMER_COL: 0.4
+:END:
+
+*** Code example :B_column:
+:PROPERTIES:
+:BEAMER_ENV: column
+:BEAMER_COL: 0.6
+:END:
+
+**** FPGA
+:PROPERTIES:
+:BEAMER_ENV: onlyenvNH
+:END:
+
+**** Verilog
+:PROPERTIES:
+:BEAMER_ENV: onlyenvNH
+:BEAMER_ACT: <3>
+:END:
+**** HLS
+:PROPERTIES:
+:BEAMER_ENV: onlyenvNH
+:BEAMER_ACT: <3>
+:END:
+
** What is High-Level Synthesis
*** High-Level Synthesis (HLS)