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authorYann Herklotz <git@yannherklotz.com>2021-10-06 09:22:29 +0100
committerYann Herklotz <git@yannherklotz.com>2021-10-06 09:22:36 +0100
commitcd3f9f9188ccd757a784f8085bb9f75548b4b286 (patch)
treeb8f3bc84a98826951e9f21cfc9d54ab9585b59f8
parent6c48fc6fe1f8d41a76c3661f210b8f42351fc15f (diff)
downloadoopsla21_fvhls-cd3f9f9188ccd757a784f8085bb9f75548b4b286.tar.gz
oopsla21_fvhls-cd3f9f9188ccd757a784f8085bb9f75548b4b286.zip
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#+columns: %45ITEM %10BEAMER_ENV(Env) %10BEAMER_ACT(Act) %4BEAMER_COL(Col)
#+setupfile: setup.org
+** Script for start :noexport:
+
+Hi, I'm Yann and I will be presenting our work on formally verified high-level synthesis.
+
+Hardware accelerators are becoming increasingly more popular in many industries, because using a CPU
+for those tasks is often overkill, as one doesn't need the flexibility a CPU offers, and they
+therefore use up too much power. Instead, one would ideally like to have a special chip that only
+does that one task, thereby using up less power and probably being more performant at that task.
+However, until recently, designing a special chip for each application is expensive. This is where
+FPGAs come in, they are reprogrammable hardware, and allow it's circuit to be configured after it
+has left the factory.
+
** The Need to Design Hardware Accelerators
Application-specific hardware accelerators are increasingly being needed in industries.