data/accumulator.htl


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main() {
  datapath {
    4:	reg_2 <= 32'd3;
    3:	reg_6[32'd0] <= reg_2;
    2:	reg_1 <= reg_6[32'd0];
    1:	reg_4 = 32'd1;
reg_5 = reg_1;
  }

  controllogic {
    4:	reg_3 <= 32'd3;
    3:	reg_3 <= 32'd2;
    2:	reg_3 <= 32'd1;
    1:	;
  }
}