Update main diagram

1 files changed, 8 insertions, 30 deletions

diff --git a/data/accumulator.htl b/data/accumulator.htl
index f7bdb8e..ecab36f 100644
--- a/data/accumulator.htl
+++ b/data/accumulator.htl
@@ -1,38 +1,16 @@
 main() {
   datapath {
-   15:	reg_8 <= 32'd1;
-   14:	reg_12[32'd0] <= reg_8;
-   13:	reg_7 <= 32'd2;
-   12:	reg_12[32'd1] <= reg_7;
-   11:	reg_6 <= 32'd3;
-   10:	reg_12[32'd2] <= reg_6;
-    9:	reg_2 <= 32'd0;
-    8:	reg_1 <= 32'd0;
-    7:	reg_5 <= 32'd0;
-    6:	reg_4 <= reg_12[{{{reg_5 + 32'd0} + {reg_1 * 32'd4}} / 32'd4}];
-    5:	reg_2 <= {{reg_2 + reg_4} + 32'd0};
-    4:	reg_1 <= {reg_1 + 32'd1};
-    3:	;
-    2:	reg_3 <= reg_2;
-    1:	reg_10 = 32'd1;
-reg_11 = reg_3;
+    4:	reg_2 <= 32'd3;
+    3:	reg_6[32'd0] <= reg_2;
+    2:	reg_1 <= reg_6[32'd0];
+    1:	reg_4 = 32'd1;
+reg_5 = reg_1;
   }
 
   controllogic {
-   15:	reg_9 <= 32'd14;
-   14:	reg_9 <= 32'd13;
-   13:	reg_9 <= 32'd12;
-   12:	reg_9 <= 32'd11;
-   11:	reg_9 <= 32'd10;
-   10:	reg_9 <= 32'd9;
-    9:	reg_9 <= 32'd8;
-    8:	reg_9 <= 32'd7;
-    7:	reg_9 <= 32'd6;
-    6:	reg_9 <= 32'd5;
-    5:	reg_9 <= 32'd4;
-    4:	reg_9 <= 32'd3;
-    3:	reg_9 <= ({$signed(reg_1) < $signed(32'd3)} ? 32'd7 : 32'd2);
-    2:	reg_9 <= 32'd1;
+    4:	reg_3 <= 32'd3;
+    3:	reg_3 <= 32'd2;
+    2:	reg_3 <= 32'd1;
     1:	;
   }
 }