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| author | Yann Herklotz <git@yannherklotz.com> | 2021-10-07 19:49:11 +0100 |
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| committer | Yann Herklotz <git@yannherklotz.com> | 2021-10-07 19:49:11 +0100 |
| commit | bcc3050c9120287c48e3c3294e0eea8b99dd61cc (patch) | |
| tree | c2e7c9be4c9febe88678680179fbd0577ac88411 | |
| parent | 5e74413490019b0909f248ec2e0c331f11be6f5d (diff) | |
| download | vericert-kvx-bcc3050c9120287c48e3c3294e0eea8b99dd61cc.tar.gz vericert-kvx-bcc3050c9120287c48e3c3294e0eea8b99dd61cc.zip | |
Fix naming and remove warnings
| -rw-r--r-- | src/hls/HTLPargen.v | 14 | ||||
| -rw-r--r-- | src/hls/RTLBlockInstr.v | 6 |
2 files changed, 10 insertions, 10 deletions
diff --git a/src/hls/HTLPargen.v b/src/hls/HTLPargen.v index 9746f92..06b3fcb 100644 --- a/src/hls/HTLPargen.v +++ b/src/hls/HTLPargen.v @@ -33,11 +33,11 @@ Require Import vericert.hls.RTLPar. Require Import vericert.hls.ValueInt. Require Import vericert.hls.Verilog. -Hint Resolve AssocMap.gempty : htlh. -Hint Resolve AssocMap.gso : htlh. -Hint Resolve AssocMap.gss : htlh. -Hint Resolve Ple_refl : htlh. -Hint Resolve Ple_succ : htlh. +#[local] Hint Resolve AssocMap.gempty : htlh. +#[local] Hint Resolve AssocMap.gso : htlh. +#[local] Hint Resolve AssocMap.gss : htlh. +#[local] Hint Resolve Ple_refl : htlh. +#[local] Hint Resolve Ple_succ : htlh. Definition assignment : Type := expr -> expr -> stmnt. @@ -74,10 +74,10 @@ Module HTLState <: State. s1.(st_controllogic)!n = None \/ s2.(st_controllogic)!n = s1.(st_controllogic)!n) -> st_incr s1 s2. - Hint Constructors st_incr : htlh. + #[local] Hint Constructors st_incr : htlh. Definition st_prop := st_incr. - Hint Unfold st_prop : htlh. + #[local] Hint Unfold st_prop : htlh. Lemma st_refl : forall s, st_prop s s. Proof. auto with htlh. Qed. diff --git a/src/hls/RTLBlockInstr.v b/src/hls/RTLBlockInstr.v index 8d3fde4..5162b38 100644 --- a/src/hls/RTLBlockInstr.v +++ b/src/hls/RTLBlockInstr.v @@ -348,9 +348,9 @@ Fixpoint init_regs (vl: list val) (rl: list reg) {struct rl} : regset := end. Record instr_state := mk_instr_state { - instr_st_regset: regset; - instr_st_predset: predset; - instr_st_mem: mem; + is_rs: regset; + is_ps: predset; + is_mem: mem; }. Section DEFINITION. |