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Diffstat (limited to 'src/hls/PrintVerilog.ml')
| -rw-r--r-- | src/hls/PrintVerilog.ml | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/hls/PrintVerilog.ml b/src/hls/PrintVerilog.ml index 2e0f0e1..343d890 100644 --- a/src/hls/PrintVerilog.ml +++ b/src/hls/PrintVerilog.ml @@ -1,7 +1,7 @@ (* -*- mode: tuareg -*- * Vericert: Verified high-level synthesis. - * Copyright (C) 2019-2020 Yann Herklotz <yann@yannherklotz.com> - * 2020 James Pollard <j@mes.dev> + * Copyright (C) 2019-2020 ___ ___ <___@______.com> + * 2020 ___ ___ <___> * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by |