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| author | Yann Herklotz <git@yannherklotz.com> | 2020-08-13 19:29:03 +0100 |
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| committer | Yann Herklotz <git@yannherklotz.com> | 2020-08-13 19:29:03 +0100 |
| commit | 15c5290ad1c656f7801a8499ae310c8aafa7af09 (patch) | |
| tree | 26938b2e818f38e6d9d52e7ed97dc7db096ad736 | |
| parent | 8f6987000e9bd7d8d5cabf7bc36ed531b3d3db80 (diff) | |
| download | verismith-15c5290ad1c656f7801a8499ae310c8aafa7af09.tar.gz verismith-15c5290ad1c656f7801a8499ae310c8aafa7af09.zip | |
Add FPGA'20 DOI link
| -rw-r--r-- | README.md | 1 |
1 files changed, 1 insertions, 0 deletions
@@ -1,6 +1,7 @@ # Verismith [](https://travis-ci.com/ymherklotz/verismith) +[](https://doi.org/10.1145/3373087.3375310) [](https://doi.org/10.5281/zenodo.3598790) Verilog Fuzzer to test the major verilog compilers by generating random, valid and deterministic Verilog. |