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authorYann Herklotz <git@yannherklotz.com>2019-11-24 13:02:38 +0000
committerYann Herklotz <git@yannherklotz.com>2019-11-24 13:02:38 +0000
commitf6825b9ba251837a649e8ef4d2446e4876696b65 (patch)
tree50ac72afecdd43dac1e968b6b14bbff86dba7775
parentd821bbe66596b402a93c3189d5497e4d287f6a83 (diff)
downloadverismith-f6825b9ba251837a649e8ef4d2446e4876696b65.tar.gz
verismith-f6825b9ba251837a649e8ef4d2446e4876696b65.zip
Fix counter-example simulation run
-rw-r--r--src/Verismith/Fuzz.hs2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/Verismith/Fuzz.hs b/src/Verismith/Fuzz.hs
index c38601a..c73f8e4 100644
--- a/src/Verismith/Fuzz.hs
+++ b/src/Verismith/Fuzz.hs
@@ -324,7 +324,7 @@ simulation src = do
pop dir $ do
liftSh $ do
cp (fromText ".." </> fromText (toText a) </> synthOutput a) $ synthOutput a
- writefile "rtl.v" $ genSource src
+ writefile "syn_identity.v" $ genSource src
ident <- runSimIcEC datadir defaultIcarus defaultIdentitySynth src b Nothing
runSimIcEC datadir defaultIcarus a src b (Just ident)
where dir = fromText $ "countereg_sim_" <> toText a