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| author | Yann Herklotz <git@yannherklotz.com> | 2019-11-12 16:50:31 +0000 |
|---|---|---|
| committer | Yann Herklotz <git@yannherklotz.com> | 2019-11-12 16:50:31 +0000 |
| commit | 1a1b29c8398f089af0c3c57f9f454cb720534722 (patch) | |
| tree | f4e690d1809485b3299ff3c8b6310b0512d74c68 /data | |
| parent | e2f6a008feb304fd4e6497bfc41a4a32740e2adf (diff) | |
| download | verismith-1a1b29c8398f089af0c3c57f9f454cb720534722.tar.gz verismith-1a1b29c8398f089af0c3c57f9f454cb720534722.zip | |
Remove second trigger for always block
Diffstat (limited to 'data')
| -rw-r--r-- | data/cells_cyclone_v.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/data/cells_cyclone_v.v b/data/cells_cyclone_v.v index 4fcd49d..ad8b977 100644 --- a/data/cells_cyclone_v.v +++ b/data/cells_cyclone_v.v @@ -220,7 +220,7 @@ module dffeas (d, clk, ena, clrn, prn, aload, asdata, sclr, sload, devclrn, devp output reg q = 0; - always @(posedge clk or posedge aload) begin + always @(posedge clk) begin if (sclr == 1'b1) q <= 0; else if (aload == 1'b1) |