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| author | Yann Herklotz <git@yannherklotz.com> | 2020-04-06 23:03:46 +0100 |
|---|---|---|
| committer | Yann Herklotz <git@yannherklotz.com> | 2020-04-06 23:03:46 +0100 |
| commit | 2b00c249a29236af734c1e5b717b859a2a54a5dc (patch) | |
| tree | 070cf697a962f3b09e673b2fee9be541e3e90788 /src/Verismith/Circuit.hs | |
| parent | d31472164e711a330e9f0a5b0a486b12abb69daf (diff) | |
| parent | 472aedf5daeb1cb0d095a63eacf259b798f56586 (diff) | |
| download | verismith-2b00c249a29236af734c1e5b717b859a2a54a5dc.tar.gz verismith-2b00c249a29236af734c1e5b717b859a2a54a5dc.zip | |
Merge branch 'develop' of github.com:ymherklotz/verismith into develop
Diffstat (limited to 'src/Verismith/Circuit.hs')
| -rw-r--r-- | src/Verismith/Circuit.hs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/Verismith/Circuit.hs b/src/Verismith/Circuit.hs index 9ca1de7..cda2f4f 100644 --- a/src/Verismith/Circuit.hs +++ b/src/Verismith/Circuit.hs @@ -34,7 +34,7 @@ import Verismith.Circuit.Random import Verismith.Verilog.AST import Verismith.Verilog.Mutate -fromGraph :: Gen ModDecl +fromGraph :: Gen (ModDecl ann) fromGraph = do gr <- rDupsCirc <$> Hog.resize 100 randomDAG return |