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| author | Yann Herklotz <git@yannherklotz.com> | 2020-03-03 03:31:47 +0000 |
|---|---|---|
| committer | Yann Herklotz <git@yannherklotz.com> | 2020-03-03 03:31:47 +0000 |
| commit | 7dd5c99e19e35f37aeee40ccdd2e076948fd4467 (patch) | |
| tree | eca7cd9f4d42172c77c7b22e9dec2d4f5b7eec34 /src/Verismith/Verilog/CodeGen.hs | |
| parent | 468946aad476bfd107a998009973c73a05c3a600 (diff) | |
| download | verismith-7dd5c99e19e35f37aeee40ccdd2e076948fd4467.tar.gz verismith-7dd5c99e19e35f37aeee40ccdd2e076948fd4467.zip | |
Add case statement to the AST
Diffstat (limited to 'src/Verismith/Verilog/CodeGen.hs')
| -rw-r--r-- | src/Verismith/Verilog/CodeGen.hs | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/src/Verismith/Verilog/CodeGen.hs b/src/Verismith/Verilog/CodeGen.hs index 303c8a2..74acfe4 100644 --- a/src/Verismith/Verilog/CodeGen.hs +++ b/src/Verismith/Verilog/CodeGen.hs @@ -242,7 +242,16 @@ pType Reg = "reg" genAssign :: Text -> Assign -> Doc a genAssign op (Assign r d e) = - hsep [lVal r, pretty op, maybe mempty delay d, expr e] + hsep . (lVal r : ) . (pretty op :) $ addMay (delay <$> d) [expr e] + +caseType :: CaseType -> Doc a +caseType CaseStandard = "case" +caseType CaseX = "casex" +caseType CaseZ = "casez" + +casePair :: CasePair -> Doc a +casePair (CasePair e s) = + vsep [hsep [expr e, colon], indent 2 $ statement s] statement :: Statement -> Doc a statement (TimeCtrl d stat) = hsep [delay d, defMap stat] |